TM4C1924NCPDT CMSIS register bit defines

Hello Andrei

Which IDE are you looking for. I believe IAR provides the same as part of the installation.

Regards
Amit

Hello Amit,

I'm using the latest version of EWARM and the only device header file I could find is TM4C1294NCPDT.h but does not contain the defines for the register bits.

Thanks,

Andrei

Hello Andrei,

You may want to check with Keil IDE. There is CMSIS provided with uVision when I last checked unless they have removed it.

However I would suggest using TivaWare, it will help a lot when writing complex system function as clock settings.

Regards
Amit

I tried with Keil. The same thing.
The header file does not contain the register bits.

Hello Andrei

OK. Let me check with both tool installations (on Tuesday) and see how we can export it on the forum

Regards
Amit

Hi,

Maybe this will help more?

This is the first thing I've tried. For some reason, the headers are for the old LM3S and LM4F devices not for the Tiva C ones.

There is no file for the TM4C1926NCPDT.

Hello Andrei

The same is available on GitHub.

github.com/.../TI

Regards
Amit

This file:

https://github.com/speters/CMSIS/blob/master/Device/TI/TM4C/Include/TM4C1294NCPDT.h

Is the same one I've found in the EWARM and Keil directories.

But it doesn't contain the register bit defines.

I wanted to know if there exists such a file. If not, I'll define the register bits I need and handle it that way.

Thanks,

Andrei

Hello Andreim

But it does contain the bit definitions.

/* ================================================================================ */
/* ================ QEI0 ================ */
/* ================================================================================ */


/**
* @brief Register map for QEI0 peripheral (QEI0)
*/

typedef struct { /*!< QEI0 Structure */
__IO uint32_t CTL; /*!< QEI Control */
__IO uint32_t STAT; /*!< QEI Status */
__IO uint32_t POS; /*!< QEI Position */
__IO uint32_t MAXPOS; /*!< QEI Maximum Position */
__IO uint32_t LOAD; /*!< QEI Timer Load */
__IO uint32_t TIME; /*!< QEI Timer */
__IO uint32_t COUNT; /*!< QEI Velocity Counter */
__IO uint32_t SPEED; /*!< QEI Velocity */
__IO uint32_t INTEN; /*!< QEI Interrupt Enable */
__IO uint32_t RIS; /*!< QEI Raw Interrupt Status */
__IO uint32_t ISC; /*!< QEI Interrupt Status and Clear */
} QEI0_Type;

Regards
Amit

Those are the registers for a specific module.
I'm talking about this, for example the bits for the CTL register:

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_CTL register.
//
//*****************************************************************************
#define QEI_CTL_FILTCNT_M 0x000F0000 // Input Filter Prescale Count
#define QEI_CTL_FILTEN 0x00002000 // Enable Input Filter
#define QEI_CTL_STALLEN 0x00001000 // Stall QEI
#define QEI_CTL_INVI 0x00000800 // Invert Index Pulse
#define QEI_CTL_INVB 0x00000400 // Invert PhB
#define QEI_CTL_INVA 0x00000200 // Invert PhA
#define QEI_CTL_VELDIV_M 0x000001C0 // Predivide Velocity
#define QEI_CTL_VELDIV_1 0x00000000 // QEI clock /1
#define QEI_CTL_VELDIV_2 0x00000040 // QEI clock /2
#define QEI_CTL_VELDIV_4 0x00000080 // QEI clock /4
#define QEI_CTL_VELDIV_8 0x000000C0 // QEI clock /8
#define QEI_CTL_VELDIV_16 0x00000100 // QEI clock /16
#define QEI_CTL_VELDIV_32 0x00000140 // QEI clock /32
#define QEI_CTL_VELDIV_64 0x00000180 // QEI clock /64
#define QEI_CTL_VELDIV_128 0x000001C0 // QEI clock /128
#define QEI_CTL_VELEN 0x00000020 // Capture Velocity
#define QEI_CTL_RESMODE 0x00000010 // Reset Mode
#define QEI_CTL_CAPMODE 0x00000008 // Capture Mode
#define QEI_CTL_SIGMODE 0x00000004 // Signal Mode
#define QEI_CTL_SWAP 0x00000002 // Swap Signals
#define QEI_CTL_ENABLE 0x00000001 // Enable QEI
#define QEI_CTL_FILTCNT_S 16

I was looking for the header file that contains the registers and the bit defines for each register. All in one place.

Hello Andrei,

That is not available.

Regards
Amit