Generating a reset signal from Tiva c TMC4123 Microcontroller

That does not appear to be a reset signal but rather the shift/*ld input to a shift register being used as a chip select for SPI.

If that is the case then using the timer needlessly complicates the solution. Just set the signal appropriately before shifting and after shifting.

Robert

Amusingly, the forum SW censored a misspelling of shift

Hello Abdel

Is there a timing associated with the signal mentioned? I.e. the signal must be low for exactly x ns?

Regards
Amit

Robert Adsett said:

Amusingly, the forum SW censored a misspelling of shift

Strange - yet good - that!      One letter astray - brings the censor your way.   We note that $ replacement for (more common) "s" evades the censor...

Yes, but for now I am just concerned with how to generate it regardless of the time.

it will not make a difference if it's a reset or not I think, but since I have multiple of this signal in my code it will be impractical to write them your way and even harder to precisely time them correctly, so I think timers will be neat and clean in this case.

Abdelrahman Tarief said:

it will not make a difference if it's a reset or not I think,

It does actually

Abdelrahman Tarief said:

but since I have multiple of this signal in my code it will be impractical to write them your way and even harder to precisely time them correctly, so I think timers will be neat and clean in this case.

I expect the reverse to be true. If what you have is what I expect from what you shown, precise timing is neither necessary or useful.  If you can share a little more of what you are doing then we could verify that. Even what IC would be useful.

It's unlikely a handful of timers will be simpler/cleaner than a pin toggle.

Robert

I edited the post, sorry for not being clear at the beginning.

Ok, that is a completely different problem than first presented. The only timing sensitive signal in that is the start/ stop.

What are you trying to generate? This seems overly complex given the processor resources available.

Robert

Auto censors do tend to be quite stupid but it did prevent accidental foul mouthedness.

Robert

it's a PUF circuit, at the end all I need is serial output data 4bits in this case.

In that case start/stop length is probably not terribly critical either. It's about 6 or 7 ns if I'm reading that correctly. So in the region 200Mhz. A pin toggle won't be too short. A timer's going to have trouble being that quick and a series of pin toggles is going to be easier to get running.

A timer would potentially be faster for the pulse but would take a lot more setup. Synchronization would have to be looked at carefully as well.

If you need that kind of ns sequencing I'd be tempted to at least consider a state machine in fast external logic. Would still need an awfully fast clock unless you were willing to have all timing be a multiple of the start/stop time. Then you just need a very fast clock.

Robert

A couple of questions of curiosity.

4 bits doesn't seem particularly uncloneable. Am I missing something?

Isn't this circuit going to be sensitive to temperature and power supply variations. IE not very repeatable?

Robert

Yes 4 bits are not enough, but those are not my final bits, I will have to get those 4 bits and compare them with another 4 bits from a different PUF stage and from that comparison I will only get one bit , then I need to compare multiple stages to get 20 bits finally.
Yes these circuit is sensitive to temperature, but not sensitive enough to change the output and for the power supply I will operate my circuit at a constant bias.

Hello Abdel,

A timer in periodic mode with bit banged GPIO in the interrupt routine would work.

Regards
Amit

Amit, you're thinking of a timer driven CAM?

I think direct bit-banging would be faster but those 2nS timings are probably impossible in any case and the CAM does have a certain elegance.

Robert

Thanks Abdelrahman, appreciate the education.

Robert

Maybe something like a 74HC40105? Still won't get you to 2ns but it can be independent from the micro's timing.

Robert

Hello Robert

Yes, I agree. I don't think without an external glue logic it would be possible.

Regards
Amit

Maybe it makes sense to move the whole circuit into a fast CPLD.

The whole interface could then be SPI.

Robert

Hello Robert,

Yes. That could work. A fast CPLD with independent clocking/PLL tree for high frequency operation.

Regards
Amit

If the nano second timing will cause a problem, I may then work with a different frequency, but what about the logic it self ?

I like Amit's cam idea. Given the speed you seem to require I'd not use a timer though, I'd simply walk through the cam as quickly as possible.

Just a simple structure, one value per entry for the value to write to a port.

Robert

Hello Robert

It will still not achieve the timing.

Regards
Amit

Not even close Amit.

I was working under the assumption he would make the suggested frequency change. I'm not sure that's really feasible though given how much it would need to change.

Robert