RM57 RTI digital watchdog (DWD) causing reset when debug halt

Hi Clio,

  See this post that I replied today. 

In RM57 or LC4357 devices the debug acknowledge signal (DBGACK) is not sent to the RTI/WD module directly. It first goes through a CTI (Cross Trigger Interface) module. By default the CTI is disabled. This means the RTI/WD modules never saw the assertion of the DBGACK signal. What you need is to first enable the CTI and also disable 'continue on suspend' in the RTI module. To enable the CTI I have provide a GEL script in that post. Please take the 2nd GEL script I attached in that post. 

 Let me know if the GEL script solves your problem.

Hi Charles,
I have tried your gel file by modifying the "rm57l8xx.gel" to add all 4 "Enable_CTIx" at the time "OnTargetConnect". Unfortunately, didn't seem to make difference. The processor still resets whenever a debug halt happens. Maybe the timing/place where I add is somehow wrong?
Please advise.
Thanks,
Clio

P.S. modified .gel file attached

2335.rm57l8xx.gel

Hi Clio,

 Please do this experiment.

 1. Enable a RTI counter

 2. Halt the CPU in the debugger and in the register window observe the RTI counter. You need to enable the continuous refresh. You should see the RTI counter changing value when in debug mode

 3. Set the COS to 0 or 1 will not make a difference. The counter should still increment

 4. Load the GEL script. In the Tools->GEL load the GEL script

 5. Select Setup_ALL_CTI like below image. I'm taking the image from the other post.

6.. repeat step 3 with COS = 1 or 0 and do you see the RTI counter stop when COS=0?

Hi Charles,
I so far don't see the counters (RTIFRCx) incrementing with or without running the gel file. Is it possible for the processsor retain the previous configuration after a reset? as I did run the gel file before, and wonder if somehow the ENABLE_CTIx values remained after a reset.
But otherwise the counters seem stopped when halted. And the values incrementing between halts.

Hi Clio,

OK, good to know that it is working.

Did you use the warm system reset? Please do a power up reset and reload the GEL. These CTI registers are debug registers which I think are reset by power up reset.

Hi Charles,

When I tried this morning, the DWD seems no longer causing reset at a debug halt.

This is what I did:
1.run my program
2.run the "Setup_All_CTI" command in the gel file you provided
3.enable DWD
4.debug halt
5.assume running without seeing a processor reset.

Now, can I somehow incorperate this "Setup_All_CTI" in the "RM57L8xx.gel" file, if yes, at which step, how? I tried to add ""Setup_All_CTI" in "OnTargetConnect()" step, but that seemed causing impass of some SL_SelfTest_xxxx that supposed to happen in HL_sys_startup, and my program was never able to reach main()

Please advise,
Thanks
Clio