Share data via RAM

Interesting question. I assume that the bootloader and the application code are each linked as separate projects. I would define all of the common variables in a single .asm file. Then modify the link command file for each project to bind the section created from that file to a specific location in RAM.

ASM file:

    .retain "bootvars"
    .retainrefs "bootvars"

    .def boot_status;
    .def boot_length;
    .def boot_start;

boot_status	.usect "bootvars", 4
boot_length .usect "bootvars", 4
boot_start  .usect "bootvars", 4

 Link command file change:

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
/* USER CODE BEGIN (5) */
/* USER CODE END */
    .intvecs : {} > VECTORS
    .text   align(8) : {} > FLASH0 | FLASH1
    .const  align(8) : {} > FLASH0 | FLASH1
    .cinit  align(8) : {} > FLASH0 | FLASH1
    .pinit  align(8) : {} > FLASH0 | FLASH1
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
	

/* USER CODE BEGIN (6) */
	.bootvars : {boot_variables.obj} > 0x08000000
/* USER CODE END */
}

/* USER CODE BEGIN (7) */
/* USER CODE END */

Hi Bob

Thank you for the answer. You're right, they are each linked as separate, single project.

But I cant see, how I can change the values of the defined variables in bootvars? Can I change them in the C-files of each project? Maybe you can give me some further advices?

Isnt it possible to only allocate those variables at a specific address in RAM in both projects and then to read out these variables?

Thanks in advance

In the C files (both for the bootloader and the application) you just have something like this:

extern unsigned int boot_status;

boot_status = 1u;

Just make sure that you don't loose the values you need doing RAM initialization.

Hi Bob

Thank you again for your help.

The part with the variable worked properly. But like you mentioned, theres the problem of RAM initialization. There are two functions in the sys_startup.c file, which overwrite the RAM. First there is:

    /* Run PBIST on CPU RAM.
     * The PBIST controller needs to be configured separately for single-port and dual-port SRAMs.
     * The CPU RAM is a single-port memory. The actual "RAM Group" for all on-chip SRAMs is defined in the
     * device datasheet.
     */
    pbistRun(0x08300020U, /* ESRAM Single Port PBIST */
             (uint32)PBIST_March13N_SP);

and then there are the memory initialization functions:

    memoryInit(0x1U);

    memoryInit( (uint32)((uint32)1U << 1U)    /* DMA RAM */
              | (uint32)((uint32)1U << 2U)    /* VIM RAM */
              | (uint32)((uint32)1U << 5U)    /* CAN1 RAM */
              | (uint32)((uint32)1U << 6U)    /* CAN2 RAM */
              | (uint32)((uint32)1U << 10U)   /* CAN3 RAM */
              | (uint32)((uint32)1U << 8U)    /* ADC1 RAM */
              | (uint32)((uint32)1U << 14U)   /* ADC2 RAM */
              | (uint32)((uint32)1U << 3U)    /* HET1 RAM */
              | (uint32)((uint32)1U << 4U)    /* HTU1 RAM */
              | (uint32)((uint32)1U << 15U)   /* HET2 RAM */
              | (uint32)((uint32)1U << 16U)   /* HTU2 RAM */
              );

Is there a possibility to initialize all the same without a small sector wheres my variable? I cant find a description to set up the passing parameter for the memoryInit() function( e.g  (uint32)((uint32)1U << 6U) /* CAN2 RAM */ is at address 0xFFF7_DE00 to 0xFFF7_DFFF and  (uint32)((uint32)1U << 10U) /* CAN3 RAM */ is at address 0xFFF7_E000 to 0xFFF7_E1FF but is shifted 10times). Is there a description of this "system"?

Kind regards

The RAM initialization is pretty much all or nothing. If you switch between application and bootloader using a software reset, you can skip the RAM initialization on the software reset. Otherwise you may have to move the variables from main (ESRAM) to a peripheral RAM during ESRAM initialization and then move them back before you initialize the peripheral RAMs. Remember that on a power-on reset all RAM locations are invalid and contain random data.