SDRAM programmable burst length

Rashmi Naik

Hi,

I am using the DK-TM4C129X kit and interfacing with the ISSI's 512Mb Synchronous DRAM. I am able to read and write from individual locations using the example code provided by TI. However, I wanted to know how to program

The SDRAM has a lot of commands like READ,WRITE,ACTIVE,BURST Terminate etc. How do I write these commands to the SDRAM using the TIVA MCU?

Thanks,

Rashmi

over 9 years ago

0 Sai Reddy over 9 years ago

TI__Mastermind 22580 points

Hello Rashmi,

I have asked my colleague to help you with this post.

Thanks,
Sai

0 Amit Ashara over 9 years ago

TI__Guru**** 244400 points

Hello Rashmi

The commands are managed by the EPI controller and is transparent to the user

Regards
Amit

0 Rashmi Naik over 9 years ago in reply to Amit Ashara

Intellectual 360 points

Hi Amit,

The only APIs provided are

1) EPIDividerSet(EPI0_BASE, 1); - sets the epi clock

2) EPIModeSet(EPI0_BASE, EPI_MODE_SDRAM); - EPI mode set

3) EPIConfigSDRAMSet(EPI0_BASE, (ui32Freq | EPI_SDRAM_FULL_POWER |

EPI_SDRAM_SIZE_512MBIT), 468); - configures refresh rate, SD RAM

4) EPIAddressMapSet(EPI0_BASE, EPI_ADDR_RAM_SIZE_256MB | EPI_ADDR_RAM_BASE_6); - Setting the address pointer

None of these apis allow for controlling the burst length or burst termination nor for choosing sequential/interleaving method of burst

Thanks,

Rashmi

0 Amit Ashara over 9 years ago in reply to Rashmi Naik

TI__Guru**** 244400 points

Hello Rashmi,

The default burst length is set during SDRAM initialization. The EPI always completes a transaction on the SDRAM bus before performing a new access. So there is no requirement for burst termination either. Also access is always sequential.

Regards
Amit

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SDRAM programmable burst length