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Hibernation mode for TIVA C TM4C1299KCZAD.

Our Tiva has 2 supply voltages: Vdd (and all other VRef & VDda) is 3.2V, Vbat (supply for hibernation) is set to 3.0V, both come from LDOs off of our system’s battery. Hibernation is triggered by our Tiva software, and when activated it also shuts down the 3.2V supply (which supplies also other circuits on the board) by disabling the 3.2V LDO.

What we observe is that the HIBn Tiva output signals drops down to 0V when we command it, but for some reasons we have not completely understood yet, it gets back up to 3.0V (pulled up to Vbat) after ~50 microseconds, and the board wakes up.

Our software is supposed to wake up when an external input connected to WAKEn pin goes down, but this signal never moves (always high) when we see the unit wake up as described above.

Additional tests have shown that this behavior seem to disappear if the 2 supply voltages are set to 3.0V (Vdd is decreased to  3.0V). Could there be some registers that need to be re-written or updated once the Vdd drops underneath Vbat?

Attached pic shows about HIB pin(Sky Blue) and WakeUp pin(Yellow). 

  • Hello Vishal,

    A couple of things to check on. First, can you query the hibernate status to see what the cause of the wakeup is? This will help in identifying the root cause. Also, I assume you are configuring the hibernate module with VDD3ON asserted, correct? If not using VDD3ON, the pin state will not be preserved.

    Second, review of the schematic (off line) shows that there could be some issues with the circuit. First, nHIB should be connected directly to the EN of the buck converter without the need for a pullup to VBAT.

    Finally, the circuit for the connection to EN looks a bit unusual to me given that there is a transistor with the mcu_nHIB input and output to the EN of the buck converter. Is this because the buck converter requires a higher voltage to actuate the EN? Still, this has a pullup to VSYS as well which could impact the EN pin state.

    So, in summary,

    1.) check on the WAKE source and let us know what this is

    2.) Insure use of VDD3ON

    3.) Try it with the pull ups in the nHIB circuit removed and a direct connection of nHIB pin to the EN pin of the buck converter if possible.

  • Hello Vishal,

    How are you configuring the clock to the Hibernate module? Can you check the behavior of VBAT while the device is put in Hibernation - is it still on, are there any glitches?

    Also post the initialization code so that we can review.

    Thanks,
    Sai
  • Hello Sai,

    VBAT is stable and glitch free. Here is our Hibernation code attached.

    /************************************************************************
    **    FUNCTION NAME   : Hibernate_init
    **
    **    DESCRIPTION     : Initialize the hibernation module.
    **
    **    ARGUMENTS       : None
    **
    **    RETURN TYPE     : None
    **
    ***************************************************************************/
    
    void Hibernate_init(void)
    {
    	uint32_t ui32Status = 0;
    
        Types_FreqHz cpuFreq;
    
        //Get the CPU clock frequency(120MHz) set in BIOS
        BIOS_getCpuFreq(&cpuFreq);
    	
        //Extract the 32-bit frequency value
        ui32SysClock = cpuFreq.lo;
    
        // Enable the hibernate module.
        SysCtlPeripheralEnable(SYSCTL_PERIPH_HIBERNATE);
    
        // Initialize these variables before they are used.
        ui32Status = 0;
    
        // Check if Hibernation module is already active, which could mean
        // that the processor is waking from a hibernation.
        if(HibernateIsActive())
        {
        	// Read the status bits to see what caused the wake.  Clear the wake
        	// source so that the device can be put into hibernation again.
        	ui32Status = HibernateIntStatus(0);
        	HibernateIntClear(ui32Status);
    
        	// System console prints to see which caused wakeup.
        	System_printf("Wake Due To : \n");
    
           	// Wake was due to the External Wake pin.
        	else if(ui32Status & HIBERNATE_INT_PIN_WAKE)
        	{
        		System_printf(" Wakeup Pin\n");
        	}
        }
    
        // Configure Hibernate module clock(120MHz).
        HibernateEnableExpClk(ui32SysClock);
    
        // If the wake was not due to the above sources, then it was a system reset.
        if(!(ui32Status & (HIBERNATE_INT_PIN_WAKE)))
        {
        	// Configure the module clock source.
        	HibernateClockConfig(HIBERNATE_OSC_LOWDRIVE);
    		
        	// Print that this was a system restart, not wake from hibernation.
        	System_printf(" System restart\n");
        }
        // Enable processor interrupts.
        IntMasterEnable();
    }
    
    /************************************************************************
    **    FUNCTION NAME   : HandleHibernate
    **
    **    DESCRIPTION     : Function to put device into Hibernate mode
    **
    **    ARGUMENTS       : None
    **
    **    RETURN TYPE     : None
    **
    ***************************************************************************/
    
    void HandleHibernate()
    {
    	uint32_t ui32Status = 0;
    	
    	// Read and clear any status bits that might have been set since last clearing them.
    	ui32Status = HibernateIntStatus(0);
    	HibernateIntClear(ui32Status);
    
    	// Configure wakeup pin for Hibernate wakeup source.
    	HibernateWakeSet(HIBERNATE_WAKE_PIN);
    
    	// Request Hibernation.
    	HibernateRequest();
    
    	// Wait for a while for hibernate to activate.  It should never get past this point.
    	SysCtlDelay(100);
    }

    Thanks,

    Vishal

  • Thank you for the suggestions Chuck, we will definitely investigate those. One note on the nHIB to EN pin: all the circuit you saw in between these pins is actually not populated, so thee two are in fact directly connected, but the 10k pull up to VBat is populated, so we should try to remove this one.
    What could this pull-up cause on the HIBn signal?
  • Hello Chuck Davenport,

    1) We are getting WAKE source as system restart.

    2) yes we are using VDD3ON.

    3)We will check on this and let you know.

    Regards,
    Vishal Thakur
  • I also need to know the clock configuration for the system and the Hibernate module.

    Thanks,
    Sai
  • Hello Sai,

    We configured clock in cfg script to system clock 120 MHz. Same is configured for hibernation module also as below:

    // Configure Hibernate module clock(120MHz).
    HibernateEnableExpClk(ui32SysClock);

    // If the wake was not due to the above sources, then it was a system reset.
    if(!(ui32Status & (HIBERNATE_INT_PIN_WAKE)))
    {
    // Configure the module clock source.
    HibernateClockConfig(HIBERNATE_OSC_LOWDRIVE);

    // Print that this was a system restart, not wake from hibernation.
    System_printf(" System restart\n");
    }

    Regards,

    Vishal Thakur

  • Vishal,

    Thanks for all of the additional information. In reference to your comment about VDD3ON mode and knowledge of your circuit, you are not/should not be using VDD3ON mode which requires VDD be maintained during hibernation. Also, reviewing your code, it appears that this is simple a stripped down version of the hibernate example provided with TivaWare so I don't believe there is any issue with your code. I believe the issue lies with the hardware. Specifically, I believe that VDD is not ramping to 0V quickly enough due to capacitive loading on the VDD rail which is preventing the MCU from entering or maintaining hibernate mode. Is it possible for you to try to sink the voltage to ground through a 1K resistor or some other suitable circuit so that the power is dissipated more quickly when the regulator is disabled by nHIB?
  • Hello Christophe,

    Realistically, the pull up shouldn't be causing any issues and is simply a measure to insure the nHIB driver is not hampered by the external circuit. The drive strength of nHIB should be more than enough to overcome the pull. Since this isn't a requirement to have the pull, this suggestion is simply an alignment to our normal implementation.
  • As I understand all these posts, we do not have obviously wrong implementation in our schematics or in our code. But the way our supplies fall when hibernation is ordered seem to cause the Tiva to either not finish the hibernation process or immediately wakeup.

    Chuck, you recommended the implementation of delays, but we do not really understand either how and when to implement it, or how these are supposed to help.

    Any additional inputs here would be welcome because we are somewhat dead in the water on this issue and not sure what to try next.

  • Hi Christophe,

    As I mentioned in an offline response, I don't think the delays will help given the device is going through reset when waking. I provided the following additional feedback today offline as well.

    Some other things to check:

    First, can you check the current draw on VBAT during this sequence. If you are seeing high current draw on VBAT during hibernation, there could be some issues with switch damage in the TM4C hibernation circuit. Generally, this shouldn’t be a problem if the RC on VBAT is populated so this is the second question; do you populate the VBAT RC circuit. I am curious about these things due to the knee I see in the scope plot of nHIB and nWAKE they provided in the initial E2E post.

    Also, it would be helpful if you could also provide a plot of VDD and VBAT in this scenario along with nHIB and nWAKE signals like above.

    In regard to the VDD ramp down, I discussed this with one of our TM4C experts (from the original TM4C design team), he mentioned that the Hibernate module will be powered by the higher of the two sources VBAT or VDD as long as the switch is working as intended. If VDD rail is held up > VBAT while ramping down, it will remain the power source for the Hibernate module. But, when it drops below VBAT, the switch will detect this and change over to VBAT automatically. So, a slow ram down shouldn’t be the cause of the issue either.
  • Hello Chuck, Sai,

    Here are some more results we got today, we still do not have a solution, but hope these results will help getting there:

    1/ RC network on VBat: we do have that implemented on our schematics: 50ohms in series between our 3.0V supply voltage and the Vbat pin, and 100nF connected between the VBat pin and ground. Id this network appropriate or other values should be tried?


    2/ HIB vs power supply voltages:

    HIB vs VBAT: Blue is HIB, Yellow – VBAT

    HIB vs VDD: Blue is HIB, Yellow – VBAT

     

    Another observation we got is that when our JTAG probe is connected to the board JTAG connector, the hibernation mode seem to work properly.
     We have not yet been able to get more details on this, but wanted to bring it up as it may help find new recommendations or things to try.

    Looking forward to hearing from you soon.

    Christophe

  • Hello Cristophe,

    Thanks for the additional plots. One thing I notice is that the time that nHIB is asserted is slightly different in each of the two plots? How much variability do you see in the time that nHIB is asserted when putting the device into hibernate mode? Were you able to get any current readings on the VBAT supply when putting the device into hibernate? 

    In regard to the RC circuit on VBAT, the values I see in the schematic provided offline match the TM4C129 design guidelines and should be fine. The question I had was more in line with is the RC populated as noted in the schematic or was something different used?

    I'll have to think through the JTAG interaction a bit more to see if there might be some interacion contributing to this issue. Is the device in active debug mode when this works or is the probe simply connected and not active? Do you see any differences in the plots of VDD, VBAT, nHIB, when the probe is attached?