The design guide mention one by pass decoupling capacitor should be placed on each VDD bin typicaly. However if you look at some reference design such as DK TM4C123G you can see there are less decoupling capacitor than VDD pin.
What to do then ?
Can you explain for example, the logic in this schematic: : 4 VDD pin, but 6 capacitor which I suppose are grouped by 2, but in this case where the last one 1.0uf is going ?