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Trace Sizes

Victor L-S
Intellectual 925 points

Hello Amit,

I am putting together a design based on your Flash reader. I am not a hardware guy so bear with me.

One school of thought says use the largest trace possible. Would that not lead to greater inductance/capacitance difficulties and longer rise/fall times?

I noticed on the design packages I have investigated TI uses 6 mil. Is there a reason behind this selection?

Thank you for your assistance.

  • 0
    TI__Guru**** 196776 points

    Hello,

    Your traces can be any size you want as long as it bigger than or equal to the minimum value that your PCB fab supports. Normally I use 5 mils regular MCU signals, and use 15 mils (>2A for 0.5oz copper, 3A for 1oz copper) for power. For power trace, it is better to use the PCB trace width calculator.

    Regards,

    QJ

  • 0 in reply to QJ Wang
    Intellectual 925 points
    Thank you for this.
    Are you able to tell me how much trace size affects transitions on a digital line?
  • 0 in reply to Victor L-S
    Guru 47900 points
    You are (really) straying from TM4C MCU issues - are you not? Might a local university or pcb fab house (w/resident experts) prove a better "tech resource?"

    While trace size has some impact - short, direct, via-avoiding tracks also are much in favor.
  • 0 in reply to cb1
    Intellectual 925 points
    When TI suggests we use their design packages which are based around the TM4C series then I prefer to know why certain practices were followed.
  • 0 in reply to Victor L-S
    Guru 47900 points
    And - has that "preference" produced any usable response?
  • 0 in reply to Victor L-S
    Guru 47900 points
    Good that - yet (surely) your visit & questioning of a pcb layout expert will prove (much) to your advantage.
  • 0 in reply to cb1
    Intellectual 925 points
    What do you contribute to here except empty ramble?
  • 0 in reply to Victor L-S
    TI__Guru**** 196776 points

    Victor,

    There is no standard and best trace width. Larger width reduces resistance, which in turn reduces the heat caused by dissipation. The width of the traces should be sized according to the estimated current that flows through the traces. Therefore, the power traces should be wider because all the current is supplied by those traces.

    When placing traces, it is always a good practice to make them as short and direct as possible. 

    Each manufacturer has its own specifications, such as minimum trace width, spacing, number pf layers, etc. Before starting your design, check with your PCB manufacturer.

    Regards,

    QJ

  • 0 in reply to cb1
    Guru 47900 points

    cb1- said:
    While trace size has some impact - short, direct, via-avoiding tracks also are much in favor.

    If the above qualifies as "ramble" I'll agree w/you.  (500+ Verified Answers and hundreds of "Likes" stand in my support!)

    Steering the forum (far) from its MCU-centric base is not without negative impact.   Those who "care" for the forum (should) respond in its best interest...

  • 0
    Guru 27665 points

    A few things

    • You might check the IPC for resources http://www.ipc.org
    • TI has repeatedly pointed out that their boards are evaluation boards not reference designs. That distinction is probably larger in TI's corporate mind than yours but it appears to mean that they not necessarily follow there own best practices when designing the boards as has been pointed out on this forum previously.
    • Layout is not only an electrical issue, it also is a mechanical and chemical issue with thermal issues thrown in. Thermal and mechanical play a role not only in operation but in production of the board.
    • There are many rules of thumb and old wives tales in layout. Some are simply a matter of history and some have never been true. So treat rules with respect but be open to the idea that they may be unfounded.
    • Check TI's guidelines

    There are probably some tutorial references around but I can't point you to any. I know the IPC has training but that may be expensive.

    Robert

  • 0 in reply to Robert Adsett
    Intellectual 925 points
    All very helpful, thank you Robert.

    I believe the caveat here is read the fine print.

    For instance TI advertises the CC2538-CC2592EM Reference Design and states...Please follow the reference design carefully to get optimum performance.

    Whereas an Eval kit might be used as a starting point but doesn't carry the "Reference Design" guarantee.