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WAIT-Signals for EMIF - How to get more than one signal?

Andreas Arnold
Prodigy 100 points
Other Parts Discussed in Thread: TMS570LC4357, HALCOGEN

Hello,

I have a flash memory and a FPGA connected to the EMIF bus of the TMS570LC4357. Each of them needs its WAIT-Signal.

In the Device Overview SPNS195B I can only find EMIF_nWAIT without any index but in HalCoGen the WAIT-Signal is stated as EMIF_nWAIT[0] and  EMIF_nWAIT[1]. In Fig. 21-27 of SPNU563 the 2nd  WAIT-Signal is connected to "GPIO (1 pin)". Is this a specific GPIO-pin? How is the GPIO configured to act as EMIF_nWAIT[1]? I cannot find anything like this in the PINMUX-section of HalCoGen.

Thanks and regards, Andreas

  • 0
    TI__Guru**** 191906 points

    Hi Andreas,

      Can you please tell me where in HalCoGen do you see EMIF_nWAIT[0] and EMIF_nWAIT[1] spelled out? I can't find in the PINMUX tab or the EMIF tab. If you could take a screenshot then I can forward to our HalCoGen team to make the correction. There is only one EMIF_nWAIT pin in the EMIF interface.

      I think the GPIO pin in Figure 21-27 can be any GPIO pin. The s/w can poll this pin to find out if the Flash device is ready or not before sending a command to it. 

  • 0 in reply to Charles Tsai
    Prodigy 100 points

    Hi Charles,

    please see the screenshots below:


    When there is only one WAIT for the EMIF, is it possible to use this one pin for both, the EMIF ASYNC2 and EMIF ASYNC3 and have an external wired AND for the two signal sources? How is the register AWCCR (Table 21-26 in SPNU563), especially the bits 16 to 23, configured to use the only one EMIF_nWAIT signal? Btw. here is also EMIF_nWAIT[0] and EMIF_nWAIT[1].

    My problem with polling any GPIO is that the extended read and write cycle is lengthened in the strobe period. And as far as we have found how to use the interface, the signals are all processed by the hardware and there is no possibility to manipulate this by software.

    Regards, Andreas

  • 0 in reply to Andreas Arnold
    TI__Guru**** 191906 points

    Hi Andreas,

      Just to clarify about the nWAIT[1] again, there is no nWAIT[1] implemented in the device. Perhaps the HalCoGen selection on either nWAIT[0] or  nWAIT[1] was meant to support the maximum EMIF configuration. However, this is not implemented in LC4357 device. Please also see below excerpt from the TRM. 

    21.3.2 Asynchronous Wait Cycle Configuration Register (AWCC)

      The asynchronous wait cycle configuration register (AWCC) is used to configure the parameters for extended wait cycles. Both the polarity of the EMIF_nWAIT pin(s) and the maximum allowable number of extended wait cycles can be configured. The AWCC is shown in Figure 21-16 and described in Table 21- 26. Not all devices support both EMIF_nWAIT[1] and EMIF_nWAIT[0], see the device-specific data manual to determine support on each device.

      Please check with your external device on the polarity of the WAIT signal whether you should use wire-AND or wire-OR and then configure the WP0 bit accordingly. 

      

  • 0 in reply to Charles Tsai
    Prodigy 100 points
    Hi Charles,

    thanks for your help, I will try to implement the wired-And (for low-active logic).

    regards, Andreas