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Writing to Port A Register GPIODATA

CamK
Intellectual 410 points

Hello,

I've used the search function to go through similar threads about this. It seems to come up recently, but I can't find my source of error. I'm attempting to modify the bootloader program (bootload_serial) for the TM4C123G microcontroller. During the UART setup  in ConfigureDevice() within bl_main.c, I want to configure a pair of transceiver pins (A2 and A3).

I'm aware that A2 and A3 are NMI pins that need to be unlocked. I'm able to modify my DEN and DIR register just fine. I'm also aware of the bit-masking/addressing required to write to the GPIODATA. I attempt to write to the pins, but when I view the register, it doesn't appear like anything was written. Am I missing something?

Thanks.

HWREG(GPIO_PORTA_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTA_BASE + GPIO_O_CR) |= ((1 << 2) | (1 << 3));

HWREG(GPIO_PORTA_BASE + GPIO_O_AFSEL) &= ~((1 << 3) | (1 << 2)); // Select A2 and A3 to function as GPIOs

HWREG(GPIO_PORTA_BASE + GPIO_O_DEN) |= (1 << 3); //Enable digital functions on DXEN
HWREG(GPIO_PORTA_BASE + GPIO_O_DEN) |= (1 << 2); //Enable digital functions on RXEN


HWREG(GPIO_PORTA_BASE + GPIO_O_DIR) |= (1 << 3); //Set DXEN as output
HWREG(GPIO_PORTA_BASE + GPIO_O_DIR) |= (1 << 2); //Set RXEN as output


HWREG(GPIO_PORTA_BASE + GPIO_O_DR4R) |= (1 << 3); //DXEN
HWREG(GPIO_PORTA_BASE + GPIO_O_DR4R) |= (1 << 2); //RXEN

HWREG(GPIO_PORTA_BASE + GPIO_O_LOCK) = 0;

HWREG(GPIO_PORTA_BASE + (GPIO_O_DATA + (0x8 << 2))) = 1; //DXEN active high
HWREG(GPIO_PORTA_BASE + (GPIO_O_DATA + (0x4 << 2))) = 0; //RXEN active low

  • 0
    TI__Mastermind 22580 points

    Hello,

    The "gpio_jtag" example in "./examples/boards/dk-tm4c129x" shows how this is done.

    From the top of my head, I think you should set the bits in GPIO_O_AFSEL register, but it looks like you are resetting them in the 3rd line of your code.

    Thanks,
    Sai

  • 0 in reply to Sai Reddy
    Guru 47900 points
    Would it not make (far more) sense for poster to employ the API (Tried/True/Tested) as opposed to DRM. (Untried, untrue, untested!)

    Would it not better serve this forum if vendor crue employed (some) consistency?
  • 0 in reply to cb1
    TI__Mastermind 22580 points
    Hello cb1,

    For unlocking a GPIO, TivaWare does not have any API. The best approach (to unlock GPIOs) is to use the API HWREG as the register and the value being written are easier to read(than using the DRM). Even GPIO driver documentation recommends using direct register writes to the registers GPIO_O_LOCK and GPIO_O_CR registers.

    You are correct in pointing out that the other registers access should be through APIs.

    Thanks,
    Sai
  • 0 in reply to Sai Reddy
    TI__Mastermind 22580 points
    Hello CamK,

    Looks like I am wrong in saying that GPIO_O_AFSEL bits should be set. I think that part of the code is correct.

    As pointed out by cb1 (and I agree), please use TivaWare APIs for the remainder of the configuration. Use Direct Memory Access only when an API is not available.

    Thanks,
    Sai
  • 0 in reply to Sai Reddy
    Guru 47900 points

    Stellaris Sai said:
    Use Direct Memory Access only when an API is not available.

    Hello Sai,

    That's a very valid point.   And so is the NEED for consistency - so that each vendor rep directs posters in the same manner...

    Conflicted and inconsistent direction - especially while the forum remains UNGUIDED - proves not the path to great success!