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Which is the USB fifo RAM, base address?

Leonardo Chiodi
Intellectual 290 points

Hi all,

In the last days I'm studing the usb protocol, but there is a doubt I can't solve.

In the USB protocol, I understood that every Endpoint share a memory space in the MCU and, through the USBTXFIFOADD and USBTXFIFOSZ I should define the address and the size for each endpoint, which is definitively accessed using EPIDX indexer.

My problem is that I can't understand where is defined the BASE address for each endpoint, in fact in the datasheet description of the USBTXFIFOADD register, on page 1146 of the datasheet, this register is defined as the "Start Address" but in terms of "how many bytes", but from where???

Finally, which is the start address of the USB FIFO SRAM memory?

Thanks a lot.

  • 0
    TI__Mastermind 22580 points
    Hello Leonardo,

    I am not an expert on USB, but looking at the function "USBFIFOConfigSet" in the file "./driverlib/usb.c", it looks like the Start Address of an Endpoint is from where the previous Endpoint was completed. As Endpoint 0 has a fixed size of 64 bytes, the start address of Endpoint 1 is 64. The start address of Endpoint 2 will be 64 + Size of Endpoint 2.

    Thanks,
    Sai
  • 0 in reply to Sai Reddy
    TI__Mastermind 22580 points
    Also the USB FIFO RAM is internal to the USB module and cannot be accessed directly. It does not use the system SRAM.

    Thanks,
    Sai
  • 0 in reply to Sai Reddy
    Intellectual 290 points

    Sure you're right !!

    The second, third and so on, all the others, will be placed in a sequential mapping, but my question was just about the first one, the endpoint zero.

    How can I choose which is the start address? Somewhere in the whole memory there should be a place where the USB fifo memory should start, isn't?

    This is my only query. Where is the base address of the EP zero? How can i choose just this position? All other EP will not be a problem.

    EP 0 has a fixed size of 64 bytes and probably, in the SRAM I could find the fifo base address.

    The reason why I tought the usb memory could be the SRAM, was just because the usb itself is the only peripheral which can directly access the DMA through the sram, as the datasheet shows on page 51 but, if you are sure that the usb memory is in the ROM, for me is the same, but the question persist.

    Thanks a lot

    Bye

  • 0 in reply to Leonardo Chiodi
    TI__Mastermind 22580 points
    Hello Leonardo,

    The Start address of Endpoint 0 is fixed and cannot be changed. As you have noted all the Endpoint addresses are calculated from this fixed Endpoint 0 address.

    When you say SRAM are you referring to the MCU's SRAM? If so, the USB FIFO RAM is different from MCU's SRAM (as mentioned before) and can only be accessed through the USB module registers to configure the Endpoints.

    SRAM is not used for USB endpoints configuration. But USB has the capability to transfer data to the SRAM directly without CPU intervention.

    Thanks,
    Sai