TI Fee Driver Integration TMS570LS0232

Ash K

Other Parts Discussed in Thread: HALCOGEN, TMS570LS0232, ASH

Hi,

I'm trying to integrate the TI FEE driver into my OS based TI Hercules (TMS570LS0232) project, but am facing some issues. If I use the Halcogen project as-is, I can initialize/write to/read from from the emulated EEPROM.

However, when I pulled the generated ti_fee* files into my OS-based project, EEPROM functionality broke -- there is no error returned by the TI_FEE* APIs, however, the emulated EEPROM reads all Fs.

Some things I tried/differences I noticed between my OS based project and the halcogen project:

My OS project was based on Halcogen 04.05.01:
- I updated my project to use Halcogen 04.05.02 files, but this did not help
My OS project is using the 5.2.5 TI ARM compiler, the Halcogen project was being built on 5.2.6
- I built the Halcogen project with 5.2.5 -- the EEPROM functionality still worked
I stepped through the TI_FEE_Init() code in the non-working case -- it did not hit any error conditions
I confirmed that EEPROM_CONFIG_HL has the same value in both cases

A few questions:

Are there any notable/relevant differences for TI FEE between 04.05.01 and 04.05.02?
Are there any compiler dependencies for the TI FEE driver?
Do I need to enable any interrupts for FEE?
Are there any other registers I can look at/compare between the working and broken case?

I've run out of ideas as to how to debug further/what else I can look at. If you have any suggestions/can provide any guidance, it will be extremely helpful. Thank you!

over 9 years ago

0 Anthony F. Seely over 9 years ago

TI__Guru 68830 points

Ash,

Does your OS execute tasks with Privilege? I think you need to be running w. Privilege for FEE.

0 Ash K over 9 years ago in reply to Anthony F. Seely

Prodigy 100 points

Hi Anthony,

Thank you for your prompt reply.

For testing purposes, I'm doing all my TI_FEE calls at the top of main() (which is invoked from _c_int00()) before any OS initialization is taking place so I'm not sure if user/privileged mode has come into play just yet (I'm using FreeRTOS) .

Also, as a data point, I compared the CPSR bits in the working and non-working case. In both cases the ARM operation mode was "System".

One thing I did notice, in non-working case, an error was reported:

FMdlStat 0x00001010 Module Status Register [Memory Mapped]

-------------

Bit 4:

Command Status

Once the FSM starts any failure will set this bit. When set, this bit informs the host that the program, erase, or validate sector command failed and the command was stopped. This bit is cleared by the Clear Status command. For some errors, this will be the only indication of an FSM error because the cause does not fall within the other error bit types.

-------------

What registers can I look at to get more details about this error?

Thank you very much.

0 Anthony F. Seely over 9 years ago in reply to Ash K

TI__Guru 68830 points

Hi Ash,

Ok so when you move this code into a task in FreeRTOS in particular you need to make sure you use the www.freertos.org/xTaskCreateRestricted.html API to give it privilege - but I agree if you are in main() you're running in system mode.

Are you seeing that just copying the code from the standalone FEE into the beginning of main() in the FreeRTOS example is failing? Are you getting any kind of exception?

Regarding that error flag, I think you want Table 4-33 Flash Module Status Register Page 209 of SPNU517B. It appears you have 2 bits set one for the Command Status and the other it seems is PGV (check me pls) which is "When set, indicates that a word is not successfully programmed after the maximum allowed number of program pulses are given for program operation."

Do you have different clock frequencies set or anything else different in the device initialization for say your FreeRTOS project verus the example project? Or how about the MPU settings if any?

Best Regards,
-Anthony

0 Ash K over 9 years ago in reply to Anthony F. Seely

Prodigy 100 points

I tried a number of things - and finally found the issue to be the way the FAPI library was included in the linker file.

Initially, I was linking it as follows under SECTIONS:

flashAPI :

{

Fapi_UserDefinedFunctions.obj (.text)

--library = F021_API_CortexR4_BE.lib

} > FLASH0

Later, I changed this to a library include at the top of the file as follows:

--library="F021_API_CortexR4_BE.lib"

After I made this change, I could successfully init/write/read to the EEPROM from my OS app. Could you explain why this may have fixed it?

Also, what is the required delay after the the TI FEE calls? It's not entirely clear from the delay function:

void delay(void)

{

unsigned int dummycnt=0x0000FFU;

{

dummycnt--;

}

while(dummycnt>0);

}

// Initialize emulated EEPROM driver

TI_Fee_Init();

{

TI_Fee_MainFunction();

delay(); // <------------------ what should this delay be?

feeStatus=TI_Fee_GetStatus(0);

}

while(feeStatus!= IDLE);

Thank you!

0 Anthony F. Seely over 9 years ago in reply to Ash K

TI__Guru 68830 points

Ash,

Ash K said:

Later, I changed this to a library include at the top of the file as follows:

--library="F021_API_CortexR4_BE.lib"

After I made this change, I could successfully init/write/read to the EEPROM from my OS app. Could you explain why this may have fixed it?

Not sure. But if it really changed something you should be able to see what it changed by looking at the .map file and comparing between two builds?

0 Ash K over 9 years ago in reply to Anthony F. Seely

Prodigy 100 points

Hi Anthony,

Will do, thanks.

Could you also please tell me know what the delay requirements between TI_Fee_MainFunction() and TI_FEE_GetStatus() are:

TI_Fee_MainFunction();

delay();

Status=TI_Fee_GetStatus(0 );

Thanks

0 Vishwanath Reddy over 9 years ago in reply to Ash K

TI__Mastermind 19365 points

Hi Ash,

Delay function is not required anymore. You can remove it from the code.

0 Ash K over 9 years ago in reply to Vishwanath Reddy

Prodigy 100 points

Thanks!

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TI Fee Driver Integration TMS570LS0232