Problem with interfacing SPI flash M25P16

Hi,

I am trying to interface Micron SPI flash M25P16 with Tiva TM4C129XNCZAD chip. If I try with TI RTOS API's everything is working fine. But its not working with  baremetal API's. We configured a GPIO as chipselect. The below is the code which i used and I am getting all 0xFF in Rx buffer. Please have a look.

int main(void)
{
volatile uint32_t ui32Loop;
uint32_t ui32SysClock,junk,i;
uint32_t txDataBuffer[20],rxDataBuffer[20]; /* Buffer for SPI rx */

ui32SysClock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
SYSCTL_CFG_VCO_480), 120000000);

/* Call board init functions. */
Board_initGeneral();

/*init spi*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
//GPIOPinConfigure()
GPIOPinConfigure(GPIO_PD3_SSI2CLK);
//GPIOPinConfigure(GPIO_PD2_SSI2FSS);
GPIOPinConfigure(GPIO_PD1_SSI2XDAT0);
GPIOPinConfigure(GPIO_PD0_SSI2XDAT1);
GPIOPinTypeGPIOOutput(FLASH_CS_BASE, FLASH_CS_PIN);
/* Configure pad settings */
GPIOPadConfigSet(GPIO_PORTD_BASE,
GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3,
GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);
GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3);
/* End of initialization for SPI */
SSIConfigSetExpClk(SSI2_BASE, ui32SysClock, SSI_FRF_MOTO_MODE_3,
SSI_MODE_MASTER, 10000000, 8);
SSIEnable(SSI2_BASE);

// /* Read data from flash */
memset(rxDataBuffer,0, 20);
memset(txDataBuffer,0, 20);


txDataBuffer[0] = READ_IDENTIFICATION;

GPIOPinWrite(FLASH_CS_BASE, FLASH_CS_PIN, 0);

SSIAdvModeSet(SSI2_BASE, SSI_ADV_MODE_WRITE);
SSIDataPut(SSI2_BASE, txDataBuffer[0]);
SSIAdvModeSet(SSI2_BASE, SSI_ADV_MODE_READ_WRITE);

for(i = 0; i < 20; i++)
{
SSIDataPut(SSI2_BASE, 0);
SSIDataGet(SSI2_BASE, &rxDataBuffer[i]);
}

GPIOPinWrite(FLASH_CS_BASE, FLASH_CS_PIN, 1);

while(1);

}



void Board_initGeneral(void)
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOR);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOS);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOT);
}