TMS570LC4357 and CCMR5

Antoine Mignon

Other Parts Discussed in Thread: TMS570LC4357

Hello,

I have an issue with CcmR5 when loading symbols after a reset.

I have flashed on the TMS570LC4357 board a program (A) that initializes core registers (to avoid CCM error), stack pointers, EMIF and MPU. After these initializations, the program loads another program (B) from flash to SDRAM and jumps to the start address of this program (B).

After a reset or a power-off, I want to reconnect with the target without reloading the program (A), thus I choose to load symbols only. After the load, CCMR5 status register 1 is equal to 0x00010000 and I get an unexpected IRQ. Sometimes it is the CCMR5 status register 2 that is equal to 0x00010000.

What could be the cause of the compare error ? Can I disable the CCM ?

Regards,

Antoine

over 9 years ago

0 Bob Crosby over 9 years ago

TI__Guru 72500 points

There is no direct way to disable the CCMR5, but whenever the CPUs are stopped by the debugger, the core compare is disabled. It is only re-enabled with a CPU reset. Not sure why you are getting those errors. Are you saying that after a power-on, you connect with the debugger and the CCMR5 error is not present, but when you load symbols CCMR5 status register is set to 0x00010000?

0 Anthony F. Seely over 9 years ago in reply to Bob Crosby

TI__Guru 68920 points

Antoine,

There is a silicon erratta that might be related.

0 Antoine Mignon over 9 years ago in reply to Anthony F. Seely

Prodigy 140 points

Thanks Anthony,

I have checked errata related to CCM but not the DEVICE ones. With the workaround the IRQ is not generated. I also clear the CCM status register 1.

@Bob : After a power-on, if I load the program that is already in flash the error does not occur. But if I load only the symbols of this program, the error occurs.

Regards,

Antoine

0 Antoine Mignon over 9 years ago in reply to Antoine Mignon

Prodigy 140 points

Hello,

The workaround clears CCM status register 1 but not CCM status register 2. When writing 1 in CPEM2 bit of CCMSR2 register the bit is not cleared : does that mean that the VIM outputs are different ? Or is it related to the errata DEVICE#56 ?

Could VIM initialization resolve my issue ?

Regards,

Antoine

0 Charles Tsai over 9 years ago in reply to Antoine Mignon

TI__Guru**** 191316 points

Hi Antoine,
Normally we see CCMR5 error upon debugger connection to the target due to CPU output mismatch but not VIM output. I think your idea to initialize the VIM is a right step to take. For the VIM, what is compared between the main VIM and the checker VIM is their nIRQ, nFIQ and IRQVECADDR signals. I don't think nIRQ or nFIQ will mismatch between the two VIMs. However, there is a chance that IRQVECADDR can mismatch if the two VIM RAMs are not initialized since the IRQVECADDR (the vector address to be sent to the CPU in hardware vectored mode) signal is based on the vectors stored in the VIM RAM.

0 Antoine Mignon over 9 years ago in reply to Charles Tsai

Prodigy 140 points

Thanks Charles,

VIM RAM initialization solves the issue.

Regards,

Antoine

0 Charles Tsai over 9 years ago in reply to Antoine Mignon

TI__Guru**** 191316 points

Hi Antoine,
Glad your problem is resolved.

Arm-based microcontrollers

Arm-based microcontrollers forum

TMS570LC4357 and CCMR5