I am using a TMS570LS1224. I am trying to receive a variable length data frame on SCI1 using DMA. The first part of the frame is a fixed length header that contains the length for the second variable length part of the frame. I have set up DMA channel 0 and Channel 1 to do this. Channel 0 is set to generate a HBC interrupt when the first fixed part has been read. Within the interrupt handler, I read the length from the frame header in memory and then set this length into the frame count for DMA channel 1. Only catch is, due to interrupt latency, I must read the actual transfer count for CH 0 to see if there was any overrun and adjust the length accordingly. I thought I could read the status register( DMASTAT) to see if ch 0 was active. If so, I would read the active transfer count register (PBACTC) to get the current count. If ch o was not active I would read the count from the working control packet assuming that if the channel was not active it must have been arbitrated out.
Unfortunately, this does not seem to work. When I read the status it almost always tells me the channel is not active even though a read of PBACTC does seem to produce the correct count. I put a while loop in to wait until I see the status for CH 0 go active (bit 0 in DMASTAT) and then read the PBACTC. This works well but it puts a delay into the interrupt routine of up to one byte transfer on the SCI port. This could cause interrupt latency problems in other areas so I would like to get rid of this.
I have also tried simply reading the PBACTC no matter what the DMASTAT register returns. This also seems to work, probably because CH 0 is the highest priority and CH 1 is not yet active. However, I am also using ch 2 and 3 for serial transmit. While it is very unlikely either of these would be in use during the receive, it cannot be ruled out.
Can you tell me a way to read the transfer count from ch 0 reliably in all circumstances? I have thought about forcing ch 0 into a pending state so it would write the working control packet registers to ram but I am not sure how to do that.
