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Project (cpu_usage.c) does not work properly with TM4C timer set 120Mhz SYSCLK or 16mHz PIOSC time bases.

Guru 55913 points

Oddly (cpu_usage.c) utility works great when it was loaded on 50Mhz LM3S MCU and called from a 5ms SYSTICK as shown below.

Symptoms are it reports a constant CPU usage speed at all times unless the usage call is placed in a 1 second polling timer handler versus 5-10ms polling of Systick handler. At which point there is drastic CPU usage swing from 19% to 3%, suspect is where the application reloads. That swing is not normally detected in 5-10ms polling intervals but is in 1 second polling intervals. Seemingly It should be able to work from Systick 5 or 10ms calls. 

It seems the 120Mhz SYSCLK may be suspect but reducing the value of the selected timer load count (0xFFFF.FFFF) to say 0x001F.FFFF makes the count cycle as noted above. The odd thing is there is no timer interrupt but it worked by calculating the time between Systick calls.

Has anyone ever tried to get (cpu_usage.c) to work with TM4C other than me? 

BTW have added 2 more timers into the configuration up to GPTM-7.

// Initialize the processor useage routine with Timer-7.
CPUUsageInit(TIMER_CLOCK_PIOSC, APP_TICKS_PER_SEC, 7);//200 AppTicks

Systick call: 

// Compute the new value for the processor usage. 	
g_ui32CPUUsage = (CPUUsageTick() +  786480) / 157286;


//*****************************************************************************
//
// The peripheral identifier for the timer modules that could be used for
// tracking CPU utilization.
//
//*****************************************************************************
static uint32_t g_pui32CPUUsageTimerPeriph[8] =
{
    SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2,
    SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5,
    SYSCTL_PERIPH_TIMER6, SYSCTL_PERIPH_TIMER7
};

//*****************************************************************************
//
// The base address of the timer modules that could be used for tracking CPU
// utilization.
//
//*****************************************************************************
static uint32_t g_pui32CPUUsageTimerBase[8] =
{
    TIMER0_BASE, TIMER1_BASE, TIMER2_BASE, TIMER3_BASE, TIMER4_BASE,
    TIMER5_BASE, TIMER6_BASE, TIMER7_BASE
};

  • Hello BP101,

    Did you look at the "udma_demo" example? It uses the "cpu_usage" utility.

    Thanks,
    Sai
  • Hi Sai,

    Thanks -- Basically that has same layout as described above post, is not working as it did with 50Mhz LM3S. Yes (cpu_usage.c) does produce a static utilization but does not indicate any load increase in the usage time factor of SYSTICK timer. Spent some time trying to debug issue without success.

    It would seem plausible polling the ARM PC register and triggering a timer could indicate how much time passes each cycle. Likely failure due to  480Mhz PLL executes application code much faster than LM3S 200mHz PLL, even with 5ms to10ms Systick period TM4C.