Hello everyone,
I'm modifying the uDMA example to work with the ADC in ping-pong mode, but it's not working, the Tiva never gets into the interrupt handle of the ADC and the buffers never gets filled.
I'm using the TM4C129X, the configuration of the ADC is the one below
//*****************************************************************************
//
// Initializes the ADC peripheral to read the
//
//*****************************************************************************
void
InitADCWithDMAModule(void)
{
//
// Enable the uDMA controller at the system level. Enable it to continue
// to run while the processor is in sleep.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);
ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UDMA);
//
// Enable the ADC module and the port where the ADC pin is
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
while(!ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_ADC0));
//******************************************************************************
//
// Start the ADC sequence configuration
//
//******************************************************************************
//
// Configure the function for the ADC pin in the port E
//
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
//
// Configure the ADC's clock to work on the desire frequency
//
ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 30);
//
// Configure the ADC's sequence in which the ADC will be working
//
ROM_ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_ALWAYS, 0);
//
// Configure step 0 on sequence 0. Sample channel 0 (ADC_CTL_CH0) in
// single-ended mode (default) and configure the interrupt flag
// (ADC_CTL_IE) to be set when the sample is done. Tell the ADC logic
// that this is the last conversion on sequence 0 (ADC_CTL_END).
// sequence 0 has 8 programmable steps. For more information on the ADC
// sequences and steps, reference the datasheet.
//
ADCSequenceStepConfigure(ADC0_BASE, 0, 0, ADC_CTL_CH0);
ADCSequenceStepConfigure(ADC0_BASE, 0, 1, ADC_CTL_CH0);
ADCSequenceStepConfigure(ADC0_BASE, 0, 2, ADC_CTL_CH0);
ADCSequenceStepConfigure(ADC0_BASE, 0, 3, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END);
//******************************************************************************
//
// Finish the ADC sequence configuration
//
//******************************************************************************
//******************************************************************************
//
// Start the DMA configuration to work along with the ADC
//
//******************************************************************************
//
// Enable the uDMA controller.
//
ROM_uDMAEnable();
//
// Assign the DMA channel, in this case the ADC0 is in the channel 14
//
ROM_uDMAChannelAssign(UDMA_CH14_ADC0_0);
//
// Point at the control table to use for channel control structures.
//
ROM_uDMAControlBaseSet(pui8ControlTable);
//
// Enables DMA for sample sequence 0 (sequence needs to be previously config)
//
ROM_ADCSequenceDMAEnable(ADC0_BASE, 0);
//
// Put the attributes in a known state for the uDMA ADC channel. These
// should already be disabled by default.
//
ROM_uDMAChannelAttributeDisable(UDMA_CH14_ADC0_0,
UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
UDMA_ATTR_HIGH_PRIORITY |
UDMA_ATTR_REQMASK);
//
// Only allow burst transfers for ADC0 channel
//
ROM_uDMAChannelAttributeEnable(UDMA_CH14_ADC0_0, UDMA_ATTR_USEBURST);
//
// Configure the control parameters for the primary control structure for
// the ADC0 channel. The primary contol structure is used for the "A"
// part of the ping-pong receive.
//
ROM_uDMAChannelControlSet(UDMA_CH14_ADC0_0 | UDMA_PRI_SELECT,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
UDMA_ARB_1024);
//
// Configure the control parameters for the alternate control structure for
// the ADC0 channel. The alternate contol structure is used for the "B"
// part of the ping-pong receive. The configuration is identical to the
// primary/A control structure.
//
ROM_uDMAChannelControlSet(UDMA_CH14_ADC0_0 | UDMA_ALT_SELECT,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
UDMA_ARB_1024);
//
// Set up the transfer parameters for the ADC0 primary control
// structure. The mode is set to ping-pong, the transfer source is the
// SSFIFO0 data register, and the destination is the receive "A" buffer. The
// transfer size is set to match the size of the buffer.
//
ROM_uDMAChannelTransferSet(UDMA_CH14_ADC0_0 | UDMA_PRI_SELECT,
UDMA_MODE_PINGPONG,
(void *)(ADC0_BASE + ADC_O_SSFIFO0),
ADCpingBuff, 1024);
//
// Set up the transfer parameters for the ADC0 alternate control
// structure. The mode is set to ping-pong, the transfer source is the
// SSFIFO0 data register, and the destination is the receive "B" buffer. The
// transfer size is set to match the size of the buffer.
//
ROM_uDMAChannelTransferSet(UDMA_CH14_ADC0_0 | UDMA_ALT_SELECT,
UDMA_MODE_PINGPONG,
(void *)(ADC0_BASE + ADC_O_SSFIFO0),
ADCpongBuff, 1024);
//
// Enable the ADC channel to transfer data
//
ROM_uDMAChannelEnable(UDMA_CH14_ADC0_0);
ROM_uDMAChannelEnable(UDMA_CHANNEL_ADC0);
//
// Enable the ADC/DMA interrupts.
//
ROM_IntEnable(INT_UDMAERR);
ROM_IntEnable(INT_ADC0SS0);
ROM_ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS0);
//******************************************************************************
//
// Finish the DMA configuration to work along with the ADC
//
//******************************************************************************
}
Regards, Juan.
