The purpose of ROM_IntMasterDisable/ROM_IntMasterEnable calls in timers code sample

Alex Farber38

Other Parts Discussed in Thread: EK-TM4C1294XL

timers code sample from C:\ti\TivaWare_C_Series-2.1.3.156\examples\boards\ek-tm4c1294xl\timers has the follwwing code in Timer0IntHandler and Timer1IntHandler:

    ROM_IntMasterDisable();
    cOne = HWREGBITW(&g_ui32Flags, 0) ? '1' : '0';
    cTwo = HWREGBITW(&g_ui32Flags, 1) ? '1' : '0';
    UARTprintf("\rT1: %c  T2: %c", cOne, cTwo);
    ROM_IntMasterEnable();

I think that ROM_IntMasterDisable/ROM_IntMasterEnable are used synchronize access to global g_ui32Flags variable. When all interrupts are disabled, another interrupt handler cannot be executed. Is this correct?

If I add the following lines to main function:

ROM_IntPrioritySet(INT_TIMER0A, 0x00);
ROM_IntPrioritySet(INT_TIMER1A, 0x00);

can I remove ROM_IntMasterDisable/ROM_IntMasterEnable lines from interrupt handlers? Since both interrupts have the same priority, interrupt handlers will be tail-chained and synchronization is not necessary. Is this correct?

over 9 years ago

0 Amit Ashara over 9 years ago

TI__Guru**** 244400 points

Hello Alex

ROM_IntMasterEnable and Disable API, enables or disables the capability of the CPU to handle the interrupt.

0 Alex Farber38 over 9 years ago in reply to Amit Ashara

Intellectual 360 points

Hello Amit,

I want to know the purpose of this call. Is it for synchronization? Does setting the same priority for both interrupts solve the synchronization problem?

0 Amit Ashara over 9 years ago in reply to Alex Farber38

TI__Guru**** 244400 points

Hello Alex

No, this is not for synchronization and what synchronization problem are you referring to?

0 Alex Farber38 over 9 years ago in reply to Amit Ashara

Intellectual 360 points

Hello Amit,

So, this is not for synchronization. In this case, what for is this code?

If I remove these two lines:

//ROM_IntMasterDisable();
cOne = HWREGBITW(&g_ui32Flags, 0) ? '1' : '0';
cTwo = HWREGBITW(&g_ui32Flags, 1) ? '1' : '0';
UARTprintf("\rT1: %c  T2: %c", cOne, cTwo);
//ROM_IntMasterEnable();

Will the program work incorrectly?

0 Amit Ashara over 9 years ago in reply to Alex Farber38

TI__Guru**** 244400 points

Hello Alex

As I mentioned in my very first reply to you "ROM_IntMasterEnable and Disable API, enables or disables the capability of the CPU to handle the interrupt."

0 Alex Farber38 over 9 years ago in reply to Amit Ashara

Intellectual 360 points

OK, my last attempt to get an answer. Why Timer0IntHandler function in this code sample contains code, which disables and then enables the capability of the CPU to handle the interrupt?
What is the purpose of disabling and disabling the capability of the CPU to handle the interrupt?

0 Amit Ashara over 9 years ago in reply to Alex Farber38

TI__Guru**** 244400 points

Hello Alex

The purpose to disable the Interrupt mechanism is to update the flags without having the recursive entry messing up the flags set in the SRAM

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The purpose of ROM_IntMasterDisable/ROM_IntMasterEnable calls in timers code sample