We're using the F021 Flash API on the Hercules TMS570LS0432 and TMS570LS1224 microcontrollers.
We're primarily using SPNU501H.pdf "F021 Flash API Version 2.01.01 Reference Guide", revised April 2015, as, well, our reference and guide for our development.
I understand that we need to be careful not to stall the CPU by attempting to read a flash memory location from the same flash bank that an erase or program command is currently being performed on. As such, we:
- Run parts of our code from RAM, if that code is calling F021 API calls which erase or program the flash
- Disable interrupts before calling such F021 API calls
- Do not enable interrupts again until after both:
- The FMSTAT register indicates that the FSM is not busy
- We have called Fapi_flushPipeline()
I have a few questions:
First: is it necessary to both poll the FMSTAT register _and_ call Fapi_flushPipeline(), or does Fapi_flushPipeline() inherently take care of ensuring that the FSM has completed its work? I notice that the recommended erase and program flows in the Reference Guide (figures 2 and 3) do not make any reference to Fapi_flushPipeline(), and only refer to the FMSTAT register. (If we can do either one or the other then I'll probably do Fapi_flushPipeline() rather than my own polling loop.)
Second: the Reference Guide implies that _ALL_ F021 Flash API calls must be called from RAM (and, by implication, called with interrupts disabled, if any of our ISRs might access flash)--not just ones which erase or program the flash.
Is this correct? If not, I would appreciate clear documentation on which F021 API calls need to be called from RAM (and, again, with interrupts disabled), and which ones can safely be run from code executing from flash.
Is it only the following calls?
- Fapi_issueAsyncCommand() (Only for some, not all, of the commands?)
- Fapi_issueAsryncCommandWithAddress() (Only for some, not all, of the commands?)
- Fapi_issueProgrammingCommand()
- Fapi_issueProgrammingCommandForEccAddress()
(For devices not using the L2FMC memory controller.)
Third: do the TMS570LS0432 or theTMS570LS1224 microcontrollers have the L2FMC memory controller?
Thank you!