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About the access specification of the register #2

Haggy
Intellectual 440 points

I am reading "TMS570LS31x/21x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual (SPNU499B)".

I want you to inform me about the access specification of the register.

About the following register, base address is not described in the manual.
Please tell me the base address.

DCC Registers
CRC Control Registers
Control Packet Memory Map (Primary Control Packet 0)
Control Packet Memory Map (Working Control Packet 0)
Transfer Unit Register Summary
Communication Controller Register Map (Special Registers)
Communication Controller Register Map (Interrupt Registers)
Communication Controller Register Map (Communication Controller Control Registers)
Communication Controller Register Map (Communication Controller Status Registers)
Communication Controller Register Map (Message Buffer Control Registers)
Communication Controller Register Map (FIFO Critical Level Register)
Communication Controller Register Map (Identification Registers)
Communication Controller Register Map (Input Buffer)
Communication Controller Register Map (Output Buffer)
DCAN Control Registers
SPI Registers
SCI/LIN Control Registers
SCI Control Registers Summary
I2C Control Register Summary
  • 0
    TI__Guru**** 191256 points

    Hi Haggy,

     The TRM does not show the base address but rather the offset address of each register. For the base address, please go to your device specific datasheet and look for the DEvice memory Map. See below screenshot. It only shows a partial listing of the modules. For complete list please go to the datasheet.

  • 0 in reply to Charles Tsai
    TI__Guru**** 191256 points
    Hi Haggy,

    Is your question answered? If your question is answered can you please click the 'Verify Answer' button to close the thread? Thanks.
  • 0 in reply to Charles Tsai
    Expert 1720 points

    Hi Charles,

    I want to know base address "Control Packet Memory Map (Primary Control Packet 0)" and "Control Packet Memory Map (Working Control Packet 0)".

    The above two registers are assigned "DMA RAM(Base address:0xFFF80000)" ?

  • 0 in reply to Arriy
    TI__Guru**** 191256 points

    Hi Arriy,

     If you look at the Table 6-20  in the datasheet that I pasted above the DMA RAM starts at 0xFFF80000. This is where the Primary Control Packet 0 will start. The working control packet is a subregion within the DMA RAM. Please go to the DMA chapter in the TRM and to get the starting address of the working control packet. The below diagram is easier to view how they are mapped. As you can see the Working Control Packet 0 starts at offset of 0x800 or the absolute address is 0xFFF80800.