RM57 SPI Default Chipselect

Dmitri Zakharevski59

Other Parts Discussed in Thread: HALCOGEN

Hello,

In the RM57 Technical Reference the Default Chip Select Register (27.3.20 ) bit [7-0] the behavior is defined in terms of 0 and 1.

How ever halcogen uses the value 0xFF instead of 1. Is the datasheet wrong?

Thanks!

over 9 years ago

0 Charles Tsai over 9 years ago

TI__Guru**** 191906 points

Hi Dmitri,

The datasheet is trying to say the each individual chip select can be configured for either active high or active low. The default value is 1 which means by default the chip select is high when there is no transfer. In other word, during transmission the chip select will be low. The HalcoGen is grouping the 8 supported chip select into a bus which is 0xFF or 11111111b. Note that in RM57 the maximum number of chip selects implemented per MibSPI module is six rathar than eight.

0 Dmitri Zakharevski59 over 9 years ago in reply to Charles Tsai

Intellectual 905 points

Thank you!

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RM57 SPI Default Chipselect