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UART flow control for CC31 module

Gello
Intellectual 390 points
Other Parts Discussed in Thread: TM4C1294NCPDT

Hi,

I am designing a custom board based on a TM4C129 MCU and a wifi CC31 module. They communicate via a 5-wire UART topology described in the link below.

processors.wiki.ti.com/.../CC31xx_UART_Host_Interface

This module requires the following software flow control: 

processors.wiki.ti.com/.../CC31xx_UART_Host_Interface

I asked to the SimpleLink WiFi CC31xx/CC32xx Forum if this protocol was the same as the one by the TivaWare UART driver, but they were not sure:

e2e.ti.com/.../1984247

Could anyone confirm that the TivaWare UART driver implements the same hw flow control needed by CC31 module? or do I have to implement it?

Thanks a lot

  • 0
    Guru 92251 points

    Gello said:
    Could anyone confirm that the TivaWare UART driver implements the same hw flow control needed by CC31 module?

    There is the TivaWare function UARTFlowControlSet() which can be used to enable hardware flow-control. Note that hardware flow-control is not available on all UART ports - check the specific device datasheet.

    The CC31xx UART Host Interface Wiki page you referenced says the host driver needs a "jitter buffer" of at least 4 bytes to prevent data loss. The UART ports on the TM4C129 devices contain a 16 entry receive FIFO which I think could be used for the "jitter buffer".

    One thing that is isn't clear from the TM4C129 datasheet is the point at which the hardware flowcontrol de-asserts UnCTS. Section 16.3.6.2 Flow Control of the TM4C1294NCPDT datasheet dated June 18, 2014 says:

    UnCTS remains asserted until the preprogrammed watermark level is reached, indicating that the Receive FIFO has no space to store additional characters.

    However, searching the datasheet can't find a definition of what the preprogrammed watermark level is.

  • 0 in reply to Chester Gillon
    Intellectual 390 points

    Thank you Chester for your answer.
    I will pay special attention to the CTS line to check if it is de-asserted as expected.