Write 16 bits in EPI GPIO Mode, no address bits -> no clock output

Nicolas Göddel

Other Parts Discussed in Thread: EK-TM4C1294XL

Hi,

I am trying to interface with a FPGA over EPI with Tiva C Series Connected LaunchPad EK-TM4C1294XL. This is my configuration:

struct GPIOPin_t {
	uint32_t gpioBase;
	uint8_t pin;
	uint32_t altPin;
};
uint8_t bits = 16;
uint32_t frequency = 500000;

// Enable EPI
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_EPI0);
while (!(ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_EPI0)));

// Enable all GPIOs for EPI
for (uint8_t i = 0; i < 10; i++) {
	ROM_SysCtlPeripheralEnable(GPIOPeriph[i]);
	while (!(ROM_SysCtlPeripheralReady(GPIOPeriph[i])));
}

// Configure GPIO for use with EPI
for (uint8_t i = 0; i < bits; i++) {
	MAP_GPIOPinConfigure(GPIOPin[i].altPin);
	GPIOPinTypeEPI(GPIOPin[i].gpioBase, GPIOPin[i].pin);
}

// Set Divider from frequency (in this case 500 kHz)
if (frequency) {
	uint32_t divider = (F_CPU / (frequency * 2) - 1) * 2;

	// Enable Clock pin
	MAP_GPIOPinConfigure(GPIOPin[31].altPin);
	GPIOPinTypeEPI(GPIOPin[31].gpioBase, GPIOPin[31].pin);

	//GPIODirModeSet(GPIOPin[31].gpioBase, GPIOPin[31].pin, GPIO_DIR_MODE_OUT);

	// Enable Frame pin
	MAP_GPIOPinConfigure(GPIOPin[30].altPin);
	GPIOPinTypeEPI(GPIOPin[30].gpioBase, GPIOPin[30].pin);
	EPIDividerSet(EPI0_BASE, divider);
}

// Enable EPI
EPIModeSet(EPI0_BASE, EPI_MODE_GENERAL);

// Set EPI Mode
EPIConfigGPModeSet(EPI0_BASE, EPI_GPMODE_CLKPIN | EPI_GPMODE_FRAME50 | EPI_GPMODE_ASIZE_NONE | EPI_GPMODE_DSIZE_32, 10, 0);

//Address map to 0xA000.0000
EPIAddressMapSet(EPI0_BASE, EPI_ADDR_PER_BASE_A | EPI_ADDR_PER_BASE_NONE);

// Calculate bit mask
if (bits >= 32) {
	bits = 32;
	bitMask = 0xffffffff;
} else {
	bitMask = (1 << bits) - 1;
}

// Write some data to EPI
uint16_t i = 0;
while(true) {
	HWREGH(EPI_PORT) = i & bitMask;
	_delay_ms(1);
}

Here are the arrays used above.

uint32_t EPI::GPIOPeriph[] = {
		SYSCTL_PERIPH_GPIOA,
		SYSCTL_PERIPH_GPIOB,
		SYSCTL_PERIPH_GPIOC,
		SYSCTL_PERIPH_GPIOG,
		SYSCTL_PERIPH_GPIOH,
		SYSCTL_PERIPH_GPIOK,
		SYSCTL_PERIPH_GPIOL,
		SYSCTL_PERIPH_GPIOM,
		SYSCTL_PERIPH_GPION,
		SYSCTL_PERIPH_GPIOQ
};

EPI::GPIOPin_t EPI::GPIOPin[] = {
		{ GPIO_PORTH_BASE, GPIO_PIN_0, GPIO_PH0_EPI0S0 },  /*  0 */
		{ GPIO_PORTH_BASE, GPIO_PIN_1, GPIO_PH1_EPI0S1 },  /*  1 */
		{ GPIO_PORTH_BASE, GPIO_PIN_2, GPIO_PH2_EPI0S2 },  /*  2 */
		{ GPIO_PORTH_BASE, GPIO_PIN_3, GPIO_PH3_EPI0S3 },  /*  3 */
		{ GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PC7_EPI0S4 },  /*  4 */
		{ GPIO_PORTC_BASE, GPIO_PIN_6, GPIO_PC6_EPI0S5 },  /*  5 */
		{ GPIO_PORTC_BASE, GPIO_PIN_5, GPIO_PC5_EPI0S6 },  /*  6 */
		{ GPIO_PORTC_BASE, GPIO_PIN_4, GPIO_PC4_EPI0S7 },  /*  7 */
		{ GPIO_PORTA_BASE, GPIO_PIN_6, GPIO_PA6_EPI0S8 },  /*  8 */
		{ GPIO_PORTA_BASE, GPIO_PIN_7, GPIO_PA7_EPI0S9 },  /*  9 */
		{ GPIO_PORTG_BASE, GPIO_PIN_1, GPIO_PG1_EPI0S10 }, /* 10 */
		{ GPIO_PORTG_BASE, GPIO_PIN_0, GPIO_PG0_EPI0S11 }, /* 11 */
		{ GPIO_PORTM_BASE, GPIO_PIN_3, GPIO_PM3_EPI0S12 }, /* 12 */
		{ GPIO_PORTM_BASE, GPIO_PIN_2, GPIO_PM2_EPI0S13 }, /* 13 */
		{ GPIO_PORTM_BASE, GPIO_PIN_1, GPIO_PM1_EPI0S14 }, /* 14 */
		{ GPIO_PORTM_BASE, GPIO_PIN_0, GPIO_PM0_EPI0S15 }, /* 15 */
		{ GPIO_PORTL_BASE, GPIO_PIN_0, GPIO_PL0_EPI0S16 }, /* 16 */
		{ GPIO_PORTL_BASE, GPIO_PIN_1, GPIO_PL1_EPI0S17 }, /* 17 */
		{ GPIO_PORTL_BASE, GPIO_PIN_2, GPIO_PL2_EPI0S18 }, /* 18 */
		{ GPIO_PORTL_BASE, GPIO_PIN_3, GPIO_PL3_EPI0S19 }, /* 19 */
		{ GPIO_PORTQ_BASE, GPIO_PIN_0, GPIO_PQ0_EPI0S20 }, /* 20 */
		{ GPIO_PORTQ_BASE, GPIO_PIN_1, GPIO_PQ1_EPI0S21 }, /* 21 */
		{ GPIO_PORTQ_BASE, GPIO_PIN_2, GPIO_PQ2_EPI0S22 }, /* 22 */
		{ GPIO_PORTQ_BASE, GPIO_PIN_3, GPIO_PQ3_EPI0S23 }, /* 23 */
		{ GPIO_PORTK_BASE, GPIO_PIN_7, GPIO_PK7_EPI0S24 }, /* 24 */
		{ GPIO_PORTK_BASE, GPIO_PIN_6, GPIO_PK6_EPI0S25 }, /* 25 */
		{ GPIO_PORTL_BASE, GPIO_PIN_4, GPIO_PL4_EPI0S26 }, /* 26 */
		{ GPIO_PORTB_BASE, GPIO_PIN_2, GPIO_PB2_EPI0S27 }, /* 27 */
		{ GPIO_PORTB_BASE, GPIO_PIN_3, GPIO_PB3_EPI0S28 }, /* 28 */
		{ GPIO_PORTN_BASE, GPIO_PIN_2, GPIO_PN2_EPI0S29 }, /* 29 */
		{ GPIO_PORTN_BASE, GPIO_PIN_3, GPIO_PN3_EPI0S30 }, /* 30 */
		{ GPIO_PORTK_BASE, GPIO_PIN_5, GPIO_PK5_EPI0S31 }, /* 31 */
		{ GPIO_PORTK_BASE, GPIO_PIN_4, GPIO_PK4_EPI0S32 }, /* 32 */
		{ GPIO_PORTL_BASE, GPIO_PIN_5, GPIO_PL5_EPI0S33 }, /* 33 */
		{ GPIO_PORTN_BASE, GPIO_PIN_4, GPIO_PN4_EPI0S34 }  /* 34 */
};

I can see the data on the first 16 pins but clock and frame is always logic high. How can I achieve that clock and frame work as desired.

over 9 years ago

0 Amit Ashara over 9 years ago

TI__Guru**** 244440 points

Hello Nicolas

What is the COUNT value set as in the EPIBAUD register?

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

I guess you mean the value I give over to EPIDividerSet(). It's 238 because F_CPU is 120,000,000.

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

Can you please send over the EPI register values after the device is programmed and also the configuration of the IO registers for each of the GPIO ports being used?

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

Next time I have the device in my hand will be Wednesday. But maybe I can take a quick look on Sunday. How would I retrieve that values? I am not well experienced with the debugger. Should I UARTprintf them after initialisation through direct memory access?
Thank you in advance.

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

The CCS IDE has a register window where the peripherals address space is populated. Look for EPI and expand the Tab. It will show the current value of the registers.

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

Hi Amit. I made a PDF with all registers because it was simpler as writing them as a plain entry into this board.

EPI-Registers.pdf

Can you find some problems here?

I started the program, and while it was looping around in a while (true) statement I paused it and copied the registers.

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

Why is the Baud Rate divided by 0xA97E? Also I see that GPIO port Q is not configured. It seems that the issue is more basic issue of configuration.

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

GPIO port Q ist not configured because I only use the first 16 bits, and my code only configures the GPIO pins which were used. Should I configure all of them anyway? I have enabled the peripheral GPIO Q, but not configured.
The baud rate value is 0x3A97E because I set a frequency of 500 Hz by the time I debugged this. I have increased the frequency to 1 MHz again and now the baud rate is 0x76 (118d).

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

Can you please enable the clock pin function in the EPIGPCFG register bit-31

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

I tried it with the following line after the initialisation I posted above:

HWREG(EPI0_BASE + EPI_O_GPCFG) |= EPI_GPMODE_CLKPIN;

It seems not to change anything. In the register table. But I found out if I set EPI_GPCFG_CLKPIN to 1 in the register view of the debugger and resume the program I get a clock output. So there is something wrong somewhere and I don't know why. :-/

0 Nicolas Göddel over 9 years ago in reply to Nicolas Göddel

Intellectual 795 points

I think I found the issue. I called my method for enabling EPI after all the configuration and this also resets the values in the GPCFG register. If I enable EPI before setting CLKPIN it works.

This was the line I called after the configuration:
EPIModeSet(EPI0_BASE, EPI_MODE_GENERAL);

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

That is strange as the Register snapshot already existed in the code.

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

Somehow I now have the problem that frame, read frame and write frame are always low. These are at Pins PB3, PN2 and PN3. I did not change anything in the code. It's strange because I see that the EPI clock acts like it is reading data. Nevertheless the pins mentions before are always low. Is there anything I have to configure in a specific way that the frames are working again? I really do not understand what is different than before.

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

Can you first check if the IOs are toggling when under GPIO control to make sure that there is no IO damage? If the IO's show 0 and 3.3V level on a multimeter or a scope, then please share the configuration you are using to activate the IO's.

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

I finally found time to check this. The GPIOs are working as expected. In GPIO mode I can toggle the pins B3 and N2 without problems. Apparently there is an other problem.

This is how I try to read and write data:

EPIAddressMapSet(EPI0_BASE, EPI_ADDR_PER_BASE_C | EPI_ADDR_PER_SIZE_256B);

volatile uint8_t*  epiFPGA8;
volatile uint16_t* epiFPGA16;
volatile uint32_t* epiFPGA32;

epiFPGA8  = (uint8_t*)0xC0000000;
epiFPGA16 = (uint16_t*)0xC0000000;
epiFPGA32 = (uint32_t*)0xC0000000;

uint32_t inline read32() {
	return epiFPGA32[0] & bitMask;
}
uint16_t inline read16() {
	return epiFPGA16[0] & bitMask;
}
uint8_t inline read8() {
	return epiFPGA8[0] & bitMask;
}

void inline write32(uint32_t value) {
	epiFPGA32[0] = value & bitMask;
}
void inline write16(uint16_t value) {
	epiFPGA16[0] = value & bitMask;
}
void inline write8(uint8_t value) {
	epiFPGA8[0] = value & bitMask;
}

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

Did you enable the IO for EPIS0S31 pin (clock pin)?

0 Nicolas Göddel over 9 years ago in reply to Amit Ashara

Intellectual 795 points

Happy new year, Amit!

I found the problem myself. I accidentally used EPI_GPMODE_DSIZE_32 in the initialisation with EPIConfigGPModeSet(). Therefore Read and Write Frame were deactivated. Now I am using EPI_GPMODE_DSIZE_24 and all things are working properly.

But I have an other question: When using EPI_GPMODE_DSIZE_24 can I simply write a 32 bit value to address 0xA0000000 and the hardware ignores the upper 8 Bits or will they be send with the next frame?

0 Amit Ashara over 9 years ago in reply to Nicolas Göddel

TI__Guru**** 244440 points

Hello Nicolas

It should ignore the upper 8-bits.

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Write 16 bits in EPI GPIO Mode, no address bits -> no clock output