This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TIVA TM4C129 / DPACC and APACC register structure

Hi,

my customer is using TM4C129 and needs to know the structure of the DPACC and APACC registers.

The datasheet says this can be found in "ARM® Debug Interface V5 Architecture Specification" document (section 4.5.2.4 APACC Data Register, section 4.5.2.5 DPACC Data Register).

Can you provide this document or a link?
Can you provide the structure of the registers?

Thanks for your support!