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Peripheral SRAM Parity fault injection

Arriy
Expert 1720 points

I'm reading "Safety Manual for TMS570LS31x and TMS570LS21x Hercules™ ARM®-Based Safety Critical Microcontrollers(Literature Number: SPNU511D)".

I have a question at chapter "7.97 Peripheral SRAM Parity".

This mechanism can perform fault injection test ?

Test procedure which I think is Test Register (DCAN TEST) in RDA (RamDirectAccess) bit set to "1", writing any data to RAM.