Hi,
I need to use EPI 16bit host mode for my design, which use a TM4C1294ncpdt to interface with an FPGA. so that the memory in the FPGA is directly mapped to the processor. There is limited information about the interface timing in the datasheet. From the read/write figures on page 853. I figured out most of the timing requirement. However, I still have several questions.
1) do all signals in host mode refer to clock_out as that in PSRAM mode? Something like the following picture.
2) Can I use the iRDY to insert wait to a EPI read/write in 16bit host mode? The same way as that for PSRAM?
thanks
Peng
