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Issue with old Stellaris LM3S1968-IQC design

Hi,

This question is about a NRND Stellaris MCU.

I have recently inherited a design at a new company and there is an issue I'm debugging where a LM3S1968-IQC sometimes fails (goes to an almost dead short and starts to draw 0.5A on the 3V3 rail, never to work again) on power-up. I think I have tracked this down to an incorrect capacitor value used in the design, but wanted to check if my reasoning seemed valid.
The capacitor in question is the bulk decoupling for the core voltage provided by the internal LDO. The application note/datasheet suggest between 1 and 3uF but a 10uF Tantalum capacitor was used instead. Taking into account the tolerance of the capacitor, this could, on some boards, lead to about 10x the charge that was specified - on start-up this might well overload the LDO. Could this potentially be causing the failure we see?

Many thanks

Charlie

  • Hello Charlie

    With a NRND part in an inherited design, it is not possible for us to say whether the device is OK or damaged (remotely) or to say if there is some other issue on the board. My safest advise would be to turn over the design to TM4C123x or TM4C129x, where we can support you better.
  • Hi again Amit,

    I'd bet that poster is asking due to (some) volume of these NRND MCU boards being present. Should that prove true (my bet) would it not make sense to modify 3-5 such boards (using lower value Cap) and run repeated Power Cycles - watching for such over-current issues?

    In addition - if an error of that magnitude was uncovered - a complete check of ALL Power Circuitry (to include component values) seems safest. (issue poster discovered may NOT stand alone!)

    This appears quick/dirty/easy (my preferred "simple" test) and should best meet poster's objective.
  • Hi both and thank you for your replies,

    There are indeed a number of boards with the issue, and test fitting the lower value cap does seem to prevent the failure - but as it's an intermittent issue, it's hard to tell if it's a real solution, or if we've just been lucky. I was hoping someone from TI might be able to make an educated guess - based on the internals of the on board LDO - as to whether this overly large capacitor could cause a full blown failure of the chip, as we are experiencing.

    Below is the part of the design that is suspect. The 10uF cap is commonly used in other parts of the board so presumably was chosen for convenience/cost saving.

    Many thanks again

  • Hello Charlie,

    Is that an electrolytic cap of 10uF?
  • You should know that (few) remain w/the deep tech knowledge of that (long) past (discontinued) device. Further - those (past) LM3S devices were implemented via different fabs - and w/different fab techniques - than the present devices.

    Finding one both "qualified, willing & co. approved" to make such an "educated guess" (with nothing to gain) may prove a severe challenge.

    I continue in the belief that your "Best and Only" remedy is to immediately initiate (proper) Power On/Off Cycling - on a suitable number of modified boards - while "praying" for success...
  • Hi Amit,

    Poster noted that 10µF cap as Tantalum...

  • Hello cb1

    Ahh., You are right.
  • Easy when one attacks 1/1000th of your volume... Surely the test suggested is poster's best course - followed by migration to (current) device...
  • Hi,

    On LM3S series we have used 1uF X7R ceramic multilayer capacitor with no problems. Tantalum capacitors are known also for high leakage current (depends...).

    Check/verify also for current on micro pins, depends on your additional hardware around. 

  • Thanks all for your input, as cb1 has suggested, the real course is to migrate to a new chip in future designs (and to use component values in line with the data-sheet...)!

    In the meantime, we shall have to hope that the new cap value solves the problem for now (which it tentatively seems to).

    Many thanks for the advice