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Delay from ADEVT or other EVENT to A/D Start of Convert

Anthony F. Seely
Guru 68950 points
Other Parts Discussed in Thread: TMS570LS20216

I'm looking in the TMS570LS20216 datasheet for information on how long it takes from the ADEVT pin (or HET pin) trigger to A/D start of convert.

Need to know latency and any jitter for example uncertainty of +/- some cycles due to synchronization.

Would also ask same question about trigger events to the MibSPI

  • 0
    TI__Genius 13810 points

    Anthony,

    As per attached snapshots, the AWM timing details is captured below,
        For SW trigger, it takes 4 vclk cycles from trigger to assertion of START pulse.
        For HW trigger, it takes 5-6 vclk cycles from trigger to assertion of START pulse.

    This information is validated by simulation. But it is not testable by our PE team. So, it will be in the next TRM release, not in the datasheet.

     Hardware trigger:

     

    Software trigger:

    Regards,

    Haixiao