This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Increasing I2C Pin driver levels on TM4C129x devices.

Other Parts Discussed in Thread: TMS320F28035

Can anyone be of assistance to help me accomplish a change in the drive level of the I2C bus output pins on the TM4C1290 device? Below is what I have tried and there seems to be NO change in the output drive levels. I can find no examples of this on the TI web site/blogs…

 

   //

   // Enable pin PA7 for I2C6 I2C6SDA

   //

   MAP_GPIOPinConfigure(GPIO_PA7_I2C6SDA);

   MAP_GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_7, GPIO_DIR_MODE_HW);

   MAP_GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_7, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);

   MAP_GPIOPinTypeI2C(GPIO_PORTA_BASE, GPIO_PIN_7);

 

   //

   // Enable pin PA6 for I2C6 I2C6SCL

   //

   MAP_GPIOPinConfigure(GPIO_PA6_I2C6SCL);

   MAP_GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_6, GPIO_DIR_MODE_HW);

   MAP_GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_6, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);

   MAP_GPIOPinTypeI2CSCL(GPIO_PORTA_BASE, GPIO_PIN_6);

  • Hello Russ

    Please refer to the following application note.

    www.ti.com/.../spma073.pdf

    The driver strength of an IO configured for I2C is a misnomer. The I2C can only drive low. It can never drive a high. The High condition is created by the Pull Up resistor. So if you want a faster pull up, a strong resistor value must be used.
  • Amit,
    Thanks for the reply. I am aware of the I2C electrical specs and that the bus only drives low. However, the literature for the 129x series implies that one of the available drive selections can be configured for the I2C pins; hence my question. I would like to drive the low state "harder". The TI literature for this family of parts does not really indicate that these selections are not available for the I2C, but testing that I have been performing suggests that the alternate drive levels for the I2C pins is not really supported. I was not sure I was performing the pin initialization correctly so I posted the question, hopeful that there really was a way to accomplish a higher driver level (low)...
    Thanks,

    Russ
  • While a lower value pull-up resistor will aid "rise time" - does it not impose some challenge upon the, "fall time?"

    Poster has not made the effort to justify his need for, "Increased I2C drive levels." That said - there do exist I2C-based "Line Amplifiers" which likely warrant poster's search, find & review...

  • Guys,

    I am not looking for faster rise times. I am looking for more strength on pulling the signal low. I am aware of the I2C electrical specifications. The question here was simply a query for assistance in taking advantage of what the TM4C129x literature suggests; that the GPIO drive strength is selectable, with no reference to exclusion of the I2C pins. I have experimented with the mechanics of trying to obtain higher driver strength, to no avail. It seems that the part does not really support higher drive strengths on the I2C I/O pins.

    I was hopeful there was a means to take advantage of this prospective provision in the part....

    Thanks,

    Russ
  • Guys,

    I am not looking for faster rise times. I am looking for more strength on pulling the signal low. I am aware of the I2C electrical specifications. The question here was simply a query for assistance in taking advantage of what the TM4C129x literature suggests; that the GPIO drive strength is selectable, with no reference to exclusion of the I2C pins. I have experimented with the mechanics of trying to obtain higher driver strength, to no avail. It seems that the part does not really support higher drive strengths on the I2C I/O pins.

    I was hopeful there was a means to take advantage of this prospective provision in the part....
  • posting on behalf of Russ...

    Guys,

    I am not looking for faster rise times. I am looking for more strength on pulling the signal low. I am aware of the I2C electrical specifications. The question here was simply a query for assistance in taking advantage of what the TM4C129x literature suggests; that the GPIO drive strength is selectable, with no reference to exclusion of the I2C pins. I have experimented with the mechanics of trying to obtain higher driver strength, to no avail. It seems that the part does not really support higher drive strengths on the I2C I/O pins.

    I was hopeful there was a means to take advantage of this prospective provision in the part....
  • Vendor's expert Amit is best qualified to guide you re: "Drive Strength while operating under I2C protocol." He posted earlier - I suspect that he'll see this - and guide further.

    While adding a device - the I2C "Line Boosters" I referenced earlier are bi-directional and seem reasonable for your objective...


  • Thanks Dan, not sure why my reply’s don’t “stick”….
     
  • I am currently trying to work with current hardware. The hardware I am working with has a TM4C129x as I2C Master and TMS320F28035 (Piccolo) as Slave. I was hopeful I could utilized a programmatic means to improve the integrity of the low level of the bus (pull it further away from the logic threshold levels).
  • Hello Dan

    Then the driver strength needs to be changed to a very high drive value. The API MAP_GPIOPadConfigSet must be used with care as for SCL the GPIO_PIN_TYPE_STD argument must be used while for SDA pins GPIO_PIN_TYPE_OD must be used.

    The 3rd argument GPIO_STRENGTH_12MA may be used for driving a stronger 0. However do note that if the pull up i strong then a higher drive strength may mean a larger current sink when the IO level is logic 0.


  • Dan,
     
    From my desk computer I can see all of the replies. There is something odd happening with the lab computer running Internet Explorer…
     
    Russ
     
  • Hello Russ,

    The question more importantly is what is causing the low level signal to be higher than 0V?
  • And - importantly - why is there a requirement for, "higher drive current?"   This remains unexplained... (thus far - only two devices (both TI MCUs) have been introduced - might this suggest an ineffective Ground Connection or Ground Common - between the two MCU boards?)