I tried configuring EPI for GPIO mode. EPI is supposed to generate interrupt at a rate of 600KHz. Instead, EPI generates interrupt at the rate of 300KHz. Attached is the code. Please let me know the issue.
Thanks & regards
Thangavel.P
*
* main.c
*/
#define EPI_PORT 0xA0000000
#include "cdt_customdatatypes.h"
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_ints.h"
#include "driverlib/pin_map.h"
#include "driverlib/rom.h"
#include "driverlib/rom_map.h"
#include "inc/hw_epi.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "inc/hw_gpio.h"
#include "driverlib/epi.h"
#include "driverlib/gpio.h"
#include "driverlib/sysctl.h"
#include "driverlib/udma.h"
#include "ESM.h"
#pragma DATA_ALIGN(pui8ControlTable, 1024)
uint8_t pui8ControlTable[1024];
U16 V_ESMRPM_U16R = 200/*Value for 10,000 RPM*/;
U32 g_ui32MemXferCount =0;
int main(void)
{
U32 v_SysClock_u32r ;
U32 v_USBPLLRate_u32r;
U32 v_temp_u32r;
//
// Set the system clock to run at 120MHz from the PLL.
//
v_SysClock_u32r = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
SYSCTL_CFG_VCO_480), 120000000);
//
// Enable all the GPIO peripherals.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOR);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOS);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOT);
ROM_GPIOPinTypeGPIOOutput(GPIO_PORTM_BASE, (GPIO_PIN_7 | GPIO_PIN_6 | GPIO_PIN_5 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0));
ROM_GPIOPinWrite(GPIO_PORTM_BASE, GPIO_PIN_0, 0);
ROM_GPIOPinWrite(GPIO_PORTM_BASE, GPIO_PIN_2, 1);
//
// Enable the EPI module.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_EPI0);
//
// Wait for the EPI module to be ready.
//
while(!SysCtlPeripheralReady(SYSCTL_PERIPH_EPI0));
//
// Configure the GPIO Pins
//
GPIOPinConfigure(GPIO_PH0_EPI0S0); // PH0 -> Crank
GPIOPinConfigure(GPIO_PH1_EPI0S1); // PH1 -> Cam 1
GPIOPinConfigure(GPIO_PH2_EPI0S2); // PH2 -> Cam 2
GPIOPinConfigure(GPIO_PH3_EPI0S3); // PH3 -> Cam 3
GPIOPinConfigure(GPIO_PC7_EPI0S4); // PC7 -> Cam 4
GPIOPinTypeEPI(GPIO_PORTC_BASE, 0x80);
GPIOPinTypeEPI(GPIO_PORTH_BASE, 0x0F);
//
// Enable the INTDIV
//
HWREG(EPI0_BASE+EPI_O_CFG) = 0x110;
//
// Set the EPI divider.
//
EPIDividerSet(EPI0_BASE, 200);
// Set EPI Mode
EPIConfigGPModeSet(EPI0_BASE, EPI_GPMODE_CLKPIN | EPI_GPMODE_ASIZE_NONE | EPI_GPMODE_DSIZE_8, 0, 0);
//
// Set the address map.
//
EPIAddressMapSet(EPI0_BASE, EPI_ADDR_RAM_SIZE_64KB | EPI_ADDR_RAM_BASE_6);
//Address map to 0xA000.0000
EPIAddressMapSet(EPI0_BASE, EPI_ADDR_PER_BASE_A | EPI_ADDR_PER_BASE_NONE);
//
// Enable the WFIFO Trigger Level
//
EPIFIFOConfig(EPI0_BASE, EPI_FIFO_CONFIG_TX_1_4);
//EPIDMATxCount(EPI0_BASE, 900);
//
// Enable the EPI interrupts
//
EPIIntEnable(EPI0_BASE, EPI_INT_TXREQ);
while(1)
{
if((EPIIntStatus(EPI0_BASE, 1) & EPI_INT_TXREQ) == EPI_INT_TXREQ)
{
v_USBPLLRate_u32r++;
if((v_USBPLLRate_u32r&0x01) == 0x01)
{
HWREGH(EPI_PORT) = 0xFF;
ROM_GPIOPinWrite(GPIO_PORTM_BASE, GPIO_PIN_0, 1);
}
else
{
HWREGH(EPI_PORT) = 0;
ROM_GPIOPinWrite(GPIO_PORTM_BASE, GPIO_PIN_0, 0);
}
}
}
return 0;
}

