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TMS570LS11x/12x PLL errata question

Tom McTaggart
Intellectual 345 points
Other Parts Discussed in Thread: TMS570LS20216

We are considering using this part because of its multiple eCAP inputs and smaller footprint. We want to be sure that we have 100% certainty that the PLL errata will not affect our operation.

1. It appears from the errata and forum discussions that the software errata workaround is not 100% effective. True?

2. It appears from the forum discussions that if we do not setup the PLL and use a direct oscillator-to-GCLK path, that we will not be subject to the errata. True?

3. Is this errata expected to be corrected any time soon, or no?

4. Should we be looking at another TI MCU to get the eCAPs (4 inputs minimum are needed)? We are doing minimal processing and I/O, but the input capture hardware, and flash and RAM ECC are very important to us.

Thanks!

  • 0
    Guru 99025 points
    You may get a better/quicker answer over in the Hercules forum:

    e2e.ti.com/.../
  • 0 in reply to Bruce McKenney
    TI__Guru**** 216557 points
    Moved accordingly.

    Regards,
    Ryan
  • 0
    TI__Guru 68920 points

    Tom McTaggart said:
    1. It appears from the errata and forum discussions that the software errata workaround is not 100% effective. True?

    Correct

    Tom McTaggart said:
    2. It appears from the forum discussions that if we do not setup the PLL and use a direct oscillator-to-GCLK path, that we will not be subject to the errata. True?

    Yes true.

    Tom McTaggart said:
    3. Is this errata expected to be corrected any time soon, or no?

    No plans to fix any of the existing errata; including this one.

    Tom McTaggart said:
    4. Should we be looking at another TI MCU to get the eCAPs (4 inputs minimum are needed)? We are doing minimal processing and I/O, but the input capture hardware, and flash and RAM ECC are very important to us.

    That is a decision you have to make but I cannot recommend a different Hercules MCU that is any better or worse with respect to this errata, and that has the ECAP. 

    You could consider the TMS570LS20216 with NHET which can perform the similar function and has ECC on the memories and self test for the CPU. Because it is based on the 130nm process, it has a different PLL and does not have this PLL issue.

    -Anthony

  • 0
    TI__Guru 72500 points

    1. The combination of test screens at TI and the implementation of the workaround described in SPNA233 have shown be very effective against erratum SSWF021#45. I have yet to verify a device which passed our current screens and then failed if the workaround with a minimum of 5 retries was implemented. However, the workaround is not guaranteed to be 100% effective.

    2. True. If you do not use the PLL, you are not affected by this issue.

    3. At this time there is no plan of new silicon revisions with this issue fixed.

  • 0 in reply to Anthony F. Seely
    Intellectual 345 points
    I thought that sounded like a good idea, until I went there and found it was NRND. The rec'd replacement is also subject to the PLL errata (TMS570LS31x). I heard somewhere that the 65 nm parts have the issue and the 130 nm parts do not, but I am inferring now that the 130 nm parts are being replaced by the 65 nm parts, etc. If I am wrong, please point me to a non-NRND part, thanks! BTW, I see there' an -EP version of the TMS570LS202x, but it is much more expensive.....