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multiple interrupt on adc0

Prateek27
Expert 1135 points

Other Parts Discussed in Thread: TM4C1294NCPDT

Hi all,

i am in very confusion, what can i do next plz help me 

i have this adc code 

void SADC_Init()
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |GPIO_PIN_7);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);
GPIOPinTypeADC(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_PROCESSOR, 0);
ADCSequenceStepConfigure(ADC0_BASE, 3, 0, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 1, ADC_CTL_CH1 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 2, ADC_CTL_CH2 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 3, ADC_CTL_CH3 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 4, ADC_CTL_CH4 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 5, ADC_CTL_CH5 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 6, ADC_CTL_CH6 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 7, ADC_CTL_CH7 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 8, ADC_CTL_CH8 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 9, ADC_CTL_CH9 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 10, ADC_CTL_CH10 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 11, ADC_CTL_CH11 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 12, ADC_CTL_CH12 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 13, ADC_CTL_CH13 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 14, ADC_CTL_CH14 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 15, ADC_CTL_CH15 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 16, ADC_CTL_D | ADC_CTL_CH16 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC0_BASE, 3, 18, ADC_CTL_D | ADC_CTL_CH18 | ADC_CTL_IE | ADC_CTL_END);
if(reference_set==0)
ADCReferenceSet(ADC0_BASE,ADC_REF_EXT_3V);
else
ADCReferenceSet(ADC0_BASE,ADC_REF_INT );
ADCIntClear(ADC0_BASE, 3);
ADCSequenceEnable(ADC0_BASE, 3);
IntEnable(ADC_INT_SS3);
IntMasterEnable();
}

now, adc input coming on any of the input and i need to handle every signal with some specification, like sample time, voltage reference, insert delay between 2 conversion. 

how what can i do next ?? give some suggestion to proceed it. 

  • 0
    TI__Guru**** 244440 points
    Hello Prateek,

    Sample Sequence 3 has only 1 step and not as many as you have described below.

    ADCSequenceStepConfigure(ADC0_BASE, 3, 0, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 1, ADC_CTL_CH1 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 2, ADC_CTL_CH2 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 3, ADC_CTL_CH3 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 4, ADC_CTL_CH4 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 5, ADC_CTL_CH5 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 6, ADC_CTL_CH6 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 7, ADC_CTL_CH7 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 8, ADC_CTL_CH8 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 9, ADC_CTL_CH9 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 10, ADC_CTL_CH10 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 11, ADC_CTL_CH11 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 12, ADC_CTL_CH12 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 13, ADC_CTL_CH13 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 14, ADC_CTL_CH14 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 15, ADC_CTL_CH15 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 16, ADC_CTL_D | ADC_CTL_CH16 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 18, ADC_CTL_D | ADC_CTL_CH18 | ADC_CTL_IE | ADC_CTL_END);

    If you need to setup every ADC channel then you have to use multiple sequences. In one ADC block there can be at most 17 inputs. Sample Sequencer 0 has 8, Sequencer 1-2 have 4 each and Sequence 3 has 1.

    Also if you set interrupt for every input channel, you would be seeing 17 interrupts for every conversion. Rather have an interrupt for the last sample of the sequencer. Then in the software decide if a channel needs to be processed for that conversion cycle.
  • 0 in reply to Amit Ashara
    Expert 1135 points

    Hi Amit,

    i get your point for insert multiple sequence like 0,1,2,3.
    my requirement to set interrupt for every channel, but how i dont know, can you suggest me how to do this. if have any example or you write some lines for me.

    if i set multiple sequence 0,1,2,3 then i think my requirement dont meet coz one signal not assign with sequence. 
    like sequence 0 - takes 8 channel
    sequence 1- next 4 channel, 
    sequence 2- next 4 channel,
    sequence 3- next one channel, 17 channel can be assigned but last one not assigned by this, what can do for this.

    now my design like this as you suggest.

    void SADC_Init()
    {
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |GPIO_PIN_7);
    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);
    GPIOPinTypeADC(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
    GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
    ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_PROCESSOR, 0);
    ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_PROCESSOR, 0);
    ADCSequenceConfigure(ADC0_BASE, 2, ADC_TRIGGER_PROCESSOR, 0);
    ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_PROCESSOR, 0);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 0, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 1, ADC_CTL_CH1 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 2, ADC_CTL_CH2 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 3, ADC_CTL_CH3 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 4, ADC_CTL_CH4 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 5, ADC_CTL_CH5 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 6, ADC_CTL_CH6 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 0, 7, ADC_CTL_CH7 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 1, 8, ADC_CTL_CH8 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 1, 9, ADC_CTL_CH9 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 1, 10, ADC_CTL_CH10 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 1, 11, ADC_CTL_CH11 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 12, ADC_CTL_CH12 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 13, ADC_CTL_CH13 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 14, ADC_CTL_CH14 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 15, ADC_CTL_CH15 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 16, ADC_CTL_D | ADC_CTL_CH16 | ADC_CTL_IE | ADC_CTL_END);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 18, ADC_CTL_D | ADC_CTL_CH18 | ADC_CTL_IE | ADC_CTL_END); -- what i put here ??
    if(reference_set==0)
    ADCReferenceSet(ADC0_BASE,ADC_REF_EXT_3V);
    else
    ADCReferenceSet(ADC0_BASE,ADC_REF_INT );
    ADCIntClear(ADC0_BASE, 0);
    ADCIntClear(ADC0_BASE, 1);
    ADCIntClear(ADC0_BASE, 2);
    ADCIntClear(ADC0_BASE, 3);
    ADCSequenceEnable(ADC0_BASE, 0);
    ADCSequenceEnable(ADC0_BASE, 1);
    ADCSequenceEnable(ADC0_BASE, 2);
    ADCSequenceEnable(ADC0_BASE, 3);
    IntEnable(ADC_INT_SS0);
    IntEnable(ADC_INT_SS1);
    IntEnable(ADC_INT_SS2);
    IntEnable(ADC_INT_SS3);
    IntMasterEnable();


    Regards
    Prateek

  • 0 in reply to Prateek27
    Expert 1135 points
    Also how can i know which channel interrupt occur at what time ???
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    Interrupt per channel step is not distinguishable. I would suggest having one interrupt for a sequencer, reading the data from the sequencer in the interrupt handler, and then making a decision as to which samples (corresponding to the channel) need to be used.

    Alternatively, order the channels in the sequencer as per the sampling rate so that data can be better handled.
  • 0 in reply to Amit Ashara
    Expert 1135 points

    HI Amit,
    hwo can i put sampling rate in tm4c1294ncpdt. i m trying many times this function but it gives error.
    all channel having different sampling rate.

    i am soo much confused in this that how to handle each an every signal with interrupt, coz my requirement is increased by functionality and i have less time to complete this.

    plz give full information and if possible then plz give some example 

  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek,

    If you have different sampling rates for every channel, then it is not possible to have different configurations for each channel as the provision is for 4 sequencers only. As I said earlier, you can sample all channels and then discard data for channels that don't need to be processed. As an example you can create a look up table in which the sample skip can be recorded. With every interrupt you can increment a variable for the sequencer. When the variable is an integral multiple of the skip count, the data can be used else discard the data and not consider.

    I can help you build a logic but not do your work for you. Examples in TivaWare though not exhaustive are a good starting point.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    Hi Amit,

    Thanks for giving ans, i can try it ASAP.
  • 0 in reply to Prateek27
    Expert 1135 points
    Hi Amit,

    can i get ADC1 for rest of the ch for sequence. plz see in privious comment marked as red color.
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek,

    You can distribute channels across the 2 ADC instances.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    Hi amit
    I need your help again,
    If i generate adc with sequence step 3 and all 16 channel and generate interrupt at 16 channel without end of sequrnce, then it will auto loop back to 1st channel ??

    At this time if i configure dma in adc then it will take data from adc in sequence step 3 at all channel;

    Plz read last code posted on this conversation
  • 0 in reply to Prateek27
    Expert 1135 points
    One more think, how to enable dma in adc conversion ??
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    Sequencer 3 has only one entry. How do you propose to add 16 channels to a single entry?
  • 0 in reply to Amit Ashara
    Expert 1135 points
    Hi amit,
    I know sequence 3 have only one entry,
    But if we can take dma which is enable when fifo half filled, thats why i use it.
    If dma transfer data to next register at every sequence than my calculation get very fast coz i get some timer issue with in this.

    And fifo will be rewrite when new result arrived.

    Now my question is, after 16th conversion it will loop back to 1st position automatic ??
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek,

    I would request you to clearly paste a code first of all, so that we are both on the same page. Then elaborate on how you envision the DMA transfer to transfer data, i.e. when the DMA transfer occurs w.r.t sequencer state.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    HI Amit,

    i will post my code tomorrow and discuses with you for next step.
  • 0 in reply to Prateek27
    Expert 1135 points
    Hi Amit,

    can you suggest me one think, how to emable any timer for 0.5ms. and in adc comparator section there is one API function as ADCComparatorRegionSet( ADC0_BASE, 0, low, high );

    so how to define low and high adc value ?? there is any formula for covertion and get result manually. plz help me within this and next will be discuses tomorrow.
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    Please refer to the periodic timer example in TivaWare installed software under example/peripheral/timers

    The ADC comparator value is set based on the code values. I.e. if you want the low to be 1V and high to be 2V, then the low and high value should be the digital converted values (Value/Ref Voltage)*4096.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    Hi Amit,

    how can i check any interrupt occur or not ??
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek,

    For handling an interrupt, a interrupt handler function needs to be created and mapped in the interrupt vector table. The interrupt vector table is there in the startup_ccs.c file. The interrupt function may be in your main code.

    To be ale to use the interrupt handler, set the mask bits correctly in the peripheral using YYYIntEnable() API, where YYY is the peripheral name and the corresponding function can be found in the driverlib header file in TivaWare/driverlib folder and enable the interrupt vector in the NVIC using IntEnable(INT_xxx) where the XXX corresponds to the peripheral as given in the hw_ints.h file.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    Hi Amit,

    i am configuring all parameter which is required to generate interrupt but when i debug my program using break point but i cant see any generate interrupt
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    Please attach your code to the forum post (attach and not paste). Did you add the interrupt handler to the startup_ccs.c file?
  • 0 in reply to Amit Ashara
    Expert 1135 points

    adc and timer init

    void SADC_Init()
    {
    ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 8);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    //SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |GPIO_PIN_7);
    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);
    GPIOPinTypeADC(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
    // GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 0, ADC_CTL_CH0 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 1, ADC_CTL_CH1 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 2, ADC_CTL_CH2 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 3, ADC_CTL_CH3 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 4, ADC_CTL_CH4 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 5, ADC_CTL_CH5 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 6, ADC_CTL_CH6 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 7, ADC_CTL_CH7 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 8, ADC_CTL_CH8 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 9, ADC_CTL_CH9 );
    ADCSequenceStepConfigure(ADC0_BASE, 3, 10, ADC_CTL_CH10);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 11, ADC_CTL_CH11);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 12, ADC_CTL_CH12);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 13, ADC_CTL_CH13);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 14, ADC_CTL_CH14);
    ADCSequenceStepConfigure(ADC0_BASE, 3, 15, ADC_CTL_CH15| ADC_CTL_IE);// | ADC_CTL_END);

    ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_ALWAYS, 0);
    ADCReferenceSet(ADC0_BASE,ADC_REF_EXT_3V);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);
    uDMAEnable();
    uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC3, UDMA_ATTR_ALL);
    uDMAChannelControlSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_16);
    uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO3),g_ui32DstBuf,MEM_BUFFER_SIZE);
    uDMAChannelEnable(UDMA_CH17_ADC0_3);

    ADCSequenceDMAEnable(ADC0_BASE, 3);
    ADCIntClear(ADC0_BASE, 3);
    ADCSequenceEnable(ADC0_BASE, 3);
    ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS3);
    IntEnable(ADC_INT_SS3);
    IntMasterEnable();


    }

    void Timer_Init()
    {
    SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
    TimerEnable(TIMER0_BASE,TIMER_A);
    TimerConfigure(TIMER0_BASE,TIMER_CFG_RTC | TIMER_CFG_B_PERIODIC);
    TimerLoadSet(TIMER0_BASE, TIMER_A, SysCtlClockGet() / 1000);
    TimerClockSourceSet(TIMER0_BASE, TIMER_CLOCK_SYSTEM);
    IntMasterEnable();
    IntEnable(INT_TIMER0A);
    u_32counter=0;
    TimerEnable(TIMER0_BASE, TIMER_A);
    }

    declaration in vector table:_ 
    extern void ADC03_IntHandler();
    extern void Timer0A_IntHandler();

     ADC03_IntHandler,                      // ADC Sequence 3

    Timer0A_IntHandler,                      // Timer 0 subtimer A

     

    interrupt gen...........

    void Timer0A_IntHandler()
    {
    TimerIntClear(TIMER0_BASE, TIMER_TIMB_TIMEOUT);
    u_32counter++;
    if(u_32counter == NUMBER_OF_INTS)
    {
    IntDisable(INT_TIMER0B);
    TimerIntDisable(TIMER0_BASE, TIMER_TIMB_TIMEOUT);
    TimerIntClear(TIMER0_BASE, TIMER_TIMB_TIMEOUT);
    }
    }

    void ADC03_IntHandler()
    {
    int i;
    ADCIntClear(ADC0_BASE, 3);
    ADCProcessorTrigger(ADC0_BASE, 3);
    while(!ADCIntStatus(ADC0_BASE, 3, false));
    ADCIntClear(ADC0_BASE, 3);
    ADCSequenceDataGet(ADC0_BASE, 3, ADC03Values);


    for (i=0;i< SCAN_BUFFER_SIZE;i++)
    {
    g_ui32ScanBuf[i]=g_ui32DstBuf[i];
    }
    SysCtlDelay(SysCtlClockGet() / ADCCH1_DelayTime);
    }

    this is my declaration... now what i do next

     

  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    1. The sample sequencer 3 can have only one entry. I see that you are trying to use 16 entries for the same. That will NOT work.
    2. The Trigger source is set for Always mode, but in the interrupt handler you have ADCProcessorTrigger call. That is bound to cause more issues (please check errata document SPMZ849).

    In situations like this, the right approach is to back to the drawing board and first construct the requirements of the system. Then build the software components for each part of the system, before integrating it.
  • 0 in reply to Amit Ashara
    Expert 1135 points 
    defination

#define MEM_BUFFER_SIZE 16
#define SCAN_BUFFER_SIZE 16
static uint32_t g_ui32DstBuf[MEM_BUFFER_SIZE];
static uint32_t g_ui32DstBuf1[MEM_BUFFER_SIZE];
static uint32_t g_ui32DstBuf2[MEM_BUFFER_SIZE];
static uint32_t g_ui32ScanBuf[SCAN_BUFFER_SIZE];

static uint32_t ui32Mode;

uint32_t udmaCtrlTable[1024/sizeof(uint32_t)]__attribute__((aligned(1024)));




  void SADC_Init()
    {
	    ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 8);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
	    //SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
	    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
	    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |GPIO_PIN_7);
	    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);
	    GPIOPinTypeADC(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
	    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
	   // GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
        ADCSequenceStepConfigure(ADC0_BASE, 0,  0, ADC_CTL_CH0 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  1, ADC_CTL_CH1 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  2, ADC_CTL_CH2 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  3, ADC_CTL_CH3 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  4, ADC_CTL_CH4 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  5, ADC_CTL_CH5 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  6, ADC_CTL_CH6 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  7, ADC_CTL_CH7 | ADC_CTL_IE );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  8, ADC_CTL_CH8 );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  9, ADC_CTL_CH9 );
        ADCSequenceStepConfigure(ADC0_BASE, 1, 10, ADC_CTL_CH10);
        ADCSequenceStepConfigure(ADC0_BASE, 1, 11, ADC_CTL_CH11| ADC_CTL_IE);
        ADCSequenceStepConfigure(ADC0_BASE, 2, 12, ADC_CTL_CH12);
        ADCSequenceStepConfigure(ADC0_BASE, 2, 13, ADC_CTL_CH13);
        ADCSequenceStepConfigure(ADC0_BASE, 2, 14, ADC_CTL_CH14);
        ADCSequenceStepConfigure(ADC0_BASE, 2, 15, ADC_CTL_CH15| ADC_CTL_IE);// | ADC_CTL_END);

		ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_ALWAYS, 0);
		ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_ALWAYS, 1);
		ADCSequenceConfigure(ADC0_BASE, 2, ADC_TRIGGER_ALWAYS, 2);
		ADCReferenceSet(ADC0_BASE,ADC_REF_INT );//ADC_REF_EXT_3V);

		ADCSequenceDMAEnable(ADC0_BASE, 0);
		ADCSequenceDMAEnable(ADC0_BASE, 1);
		ADCSequenceDMAEnable(ADC0_BASE, 2);

		ADCSequenceEnable(ADC0_BASE, 0);
		ADCSequenceEnable(ADC0_BASE, 1);
		ADCSequenceEnable(ADC0_BASE, 2);

		SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);
		uDMAEnable();

		uDMAControlBaseSet(udmaCtrlTable);

		uDMAChannelAssign(UDMA_CH14_ADC0_0);
		uDMAChannelAssign(UDMA_CH15_ADC0_1);
		uDMAChannelAssign(UDMA_CH16_ADC0_2);

		uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC0,UDMA_ATTR_USEBURST | UDMA_ATTR_ALL |(UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK));

		uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC0, UDMA_ATTR_ALL);
		uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC1, UDMA_ATTR_ALL);
		uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC2, UDMA_ATTR_ALL);

		uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_128);
		uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_16);
		uDMAChannelControlSet(UDMA_CHANNEL_ADC2 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_16);
		//uDMAChannelControlSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_16);
		uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO0),g_ui32DstBuf,MEM_BUFFER_SIZE);
		uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO1),g_ui32DstBuf1,MEM_BUFFER_SIZE);
		uDMAChannelTransferSet(UDMA_CHANNEL_ADC2 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO2),g_ui32DstBuf2,MEM_BUFFER_SIZE);
		uDMAChannelEnable(UDMA_CH14_ADC0_0);
		uDMAChannelEnable(UDMA_CH15_ADC0_1);
		uDMAChannelEnable(UDMA_CH16_ADC0_2);

		ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS0);
		ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS1);
		ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS2);

		IntEnable(ADC_INT_SS0);
		IntEnable(ADC_INT_SS1);
		IntEnable(ADC_INT_SS2);

		IntMasterEnable();


    }

after interrupt getting 

void ADC00_IntHandler()
{
	ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS0);

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)
    {

    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO0),g_ui32DstBuf,MEM_BUFFER_SIZE);
        uDMAChannelEnable(UDMA_CHANNEL_ADC0);
    }
}

void ADC01_IntHandler()
{
	ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS1);

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)
    {

    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO1),g_ui32DstBuf1,MEM_BUFFER_SIZE);
        uDMAChannelEnable(UDMA_CHANNEL_ADC0);
    }
}

void ADC02_IntHandler()
{
	ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS2);

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)
    {

    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO2),g_ui32DstBuf2,MEM_BUFFER_SIZE);
        uDMAChannelEnable(UDMA_CHANNEL_ADC0);
    }
}

vector table 

	ADC00_IntHandler,                      // ADC Sequence 0
	ADC01_IntHandler,                      // ADC Sequence 1
	ADC02_IntHandler,                      // ADC Sequence 2

     now whats next ??

    Hi Amit,

    further i can change my code. again i am not getting any interrupt.

  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    ADCSequenceStepConfigure API parameter for Step number can go from 0-7, 0-3 or 0 depending in which Sample Sequencer you are using. it does not go from 0-15. Please correct the same. Also as I said earlier, first simplify the code by using Processor Trigger, so that the DMA path can be cleared and then go to other trigger sources once the DMA part of the code has been stabilized.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    Hi Amit,
    can you please correct it by writing, i cant understand it now,
    plz modifie code with simple commenting.
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    Are you asking me to develop your code? Clearly you are going by brute force method for code development, rather than reading the examples and the driverlib user guide document which describe the API usage.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    HI Amit,
    i am just requesting you because i am very confused about it. i am trying many examples and google search but i cant find any relevant example code which is fulfill my requirement. i you think i am forcing you then break this discussion simply replying i am not supporting you.
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello prateek

    Stating that "not supporting you" is not a professional response and I would never do that. What I would always try to do is steer you to a development path rather than google search for a code that meets your requirements 100% (hardly likely that someone would do that). One of the keys to do is to review your code and suggest the right approach for developing so that the code evolves into the final expected code, while providing enough debug hooks so that each sub-component of the code can be debugged during the development process.
  • 0 in reply to Amit Ashara
    Expert 1135 points
    HI Amit,

    first i am really sorry for saying that,
    2nd i am not getting your point what exactly you say. i am trying many times to change our development process but i am not getting any result form it. thats i say plz modify where i am wrong. i know you are busy in supporting others who have problem like me but i have no other resource to solve my problem.
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    The process is a step-by-step exercise

    1. Write a simple ADC code with a single sample sequencer to sample 8 channels under Processor Trigger and read the value without an interrupt handler in the main code and display it on a COM port console
    2. Once exercise #1 is completed successfully and tested as well, update the code to do the same with multiple sample sequencers.
    3. Once exercise #2 is completed successfully and tested as well, remove the main code loop to read the data and instead use an interrupt handler.

    Once the above 3 are complete, we can then work on integrating the DMA and Trigger. Is that agreeable?
  • 0 in reply to Amit Ashara
    Expert 1135 points
    Hi amit,

    i done these exercise before stating my project without interrupt and get proper data further i proceed to generate interrupt, i am not getting any interrupt. next i will init dma in my code and complete my code but in debugging process i failed so i will start discussion here.

    at this time i am in much more confusion what i do next to complete it and where i was wrong.
  • 0 in reply to Prateek27
    Expert 1135 points
    HI amit,
    you are saying that
    ADCSequenceStepConfigure(ADC0_BASE, 0, 4, ADC_CTL_CH4 );
    ADCSequenceStepConfigure(ADC0_BASE, 0, 5, ADC_CTL_CH5 );
    ADCSequenceStepConfigure(ADC0_BASE, 0, 6, ADC_CTL_CH6 );
    ADCSequenceStepConfigure(ADC0_BASE, 0, 7, ADC_CTL_CH7 | ADC_CTL_IE );
    ADCSequenceStepConfigure(ADC0_BASE, 1, 0, ADC_CTL_CH8 );
    ADCSequenceStepConfigure(ADC0_BASE, 1, 1, ADC_CTL_CH9 );
    ADCSequenceStepConfigure(ADC0_BASE, 1, 2, ADC_CTL_CH10);
    ADCSequenceStepConfigure(ADC0_BASE, 1, 3, ADC_CTL_CH11| ADC_CTL_IE);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 0, ADC_CTL_CH12);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 1, ADC_CTL_CH13);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 2, ADC_CTL_CH14);
    ADCSequenceStepConfigure(ADC0_BASE, 2, 3, ADC_CTL_CH15| ADC_CTL_IE);

    this is write or not.
    after that check dma init my code which is right or not
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello prateek,

    First thing first. The code mentioned above is correct except that for Sequencer 0 steps 0-3 are missing. It could be a copy-paste mistake.

    Second of all, let us revisit the corrected code for interrupt mechanism. Please attach your corrected code file and NOT PASTE IT.
  • 0 in reply to Amit Ashara
    Expert 1135 points

    Hi Amit,

    i am attaching my code.

    Fullscreen 8004.main.c Download 
    #include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <math.h>
#include "inc/hw_memmap.h"
#include "inc/hw_adc.h"
#include "inc/tm4c129xnczad.h"
#include "driverlib/sysctl.h"
#include "driverlib/pin_map.h"
#include "driverlib/gpio.h"
#include "driverlib/adc.h"
#include "driverlib/interrupt.h"

#define MEM_BUFFER_SIZE 16
#define SCAN_BUFFER_SIZE 16
static uint32_t g_ui32DstBuf[MEM_BUFFER_SIZE];
static uint32_t g_ui32DstBuf1[MEM_BUFFER_SIZE];
static uint32_t g_ui32DstBuf2[MEM_BUFFER_SIZE];
static uint32_t g_ui32ScanBuf[SCAN_BUFFER_SIZE];

static uint32_t ui32Mode;

uint32_t udmaCtrlTable[1024/sizeof(uint32_t)]__attribute__((aligned(1024)));


void sysclk()
{
	SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_25MHZ);
	SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
			SYSCTL_CFG_VCO_480), 120000000);
}


  void SADC_Init()
    {
	    ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 8);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
	    //SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
	    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
	    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |GPIO_PIN_7);
	    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);
	    GPIOPinTypeADC(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
	    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
	   // GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
        ADCSequenceStepConfigure(ADC0_BASE, 0,  0, ADC_CTL_CH0 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  1, ADC_CTL_CH1 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  2, ADC_CTL_CH2 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  3, ADC_CTL_CH3 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  4, ADC_CTL_CH4 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  5, ADC_CTL_CH5 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  6, ADC_CTL_CH6 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  7, ADC_CTL_CH7 | ADC_CTL_IE );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  0, ADC_CTL_CH8 );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  1, ADC_CTL_CH9 );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  2, ADC_CTL_CH10);
        ADCSequenceStepConfigure(ADC0_BASE, 1,  3, ADC_CTL_CH11| ADC_CTL_IE);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  0, ADC_CTL_CH12);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  1, ADC_CTL_CH13);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  2, ADC_CTL_CH14);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  3, ADC_CTL_CH15| ADC_CTL_IE);// | ADC_CTL_END);

		ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_ALWAYS, 0);
		ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_ALWAYS, 1);
		ADCSequenceConfigure(ADC0_BASE, 2, ADC_TRIGGER_ALWAYS, 2);
		ADCReferenceSet(ADC0_BASE,ADC_REF_INT );//ADC_REF_EXT_3V);

		ADCSequenceDMAEnable(ADC0_BASE, 0);
		ADCSequenceDMAEnable(ADC0_BASE, 1);
		ADCSequenceDMAEnable(ADC0_BASE, 2);

		ADCSequenceEnable(ADC0_BASE, 0);
		ADCSequenceEnable(ADC0_BASE, 1);
		ADCSequenceEnable(ADC0_BASE, 2);

		SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);
		uDMAEnable();

		uDMAControlBaseSet(udmaCtrlTable);

		uDMAChannelAssign(UDMA_CH14_ADC0_0);
		uDMAChannelAssign(UDMA_CH15_ADC0_1);
		uDMAChannelAssign(UDMA_CH16_ADC0_2);

		uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC0,UDMA_ATTR_USEBURST | UDMA_ATTR_ALL |(UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK));
		uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC1,UDMA_ATTR_USEBURST | UDMA_ATTR_ALL |(UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK));
		uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC2,UDMA_ATTR_USEBURST | UDMA_ATTR_ALL |(UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK));

		uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC0, UDMA_ATTR_ALL);
		uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC1, UDMA_ATTR_ALL);
		uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC2, UDMA_ATTR_ALL);

		uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_128);
		uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_16);
		uDMAChannelControlSet(UDMA_CHANNEL_ADC2 | UDMA_PRI_SELECT, UDMA_SIZE_32 | UDMA_SRC_INC_NONE | UDMA_DST_INC_32 | UDMA_ARB_16);
		uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO0),g_ui32DstBuf,MEM_BUFFER_SIZE);
		uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO1),g_ui32DstBuf1,MEM_BUFFER_SIZE);
		uDMAChannelTransferSet(UDMA_CHANNEL_ADC2 | UDMA_PRI_SELECT,UDMA_MODE_PINGPONG,(void *)(ADC0_BASE + ADC_O_SSFIFO2),g_ui32DstBuf2,MEM_BUFFER_SIZE);
		uDMAChannelEnable(UDMA_CH14_ADC0_0);
		uDMAChannelEnable(UDMA_CH15_ADC0_1);
		uDMAChannelEnable(UDMA_CH16_ADC0_2);

		ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS0);
		ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS1);
		ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS2);

		IntEnable(ADC_INT_SS0);
		IntEnable(ADC_INT_SS1);
		IntEnable(ADC_INT_SS2);

		IntMasterEnable();


    }


void ADC00_IntHandler()
{
	ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS0);

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)
    {

    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO0),g_ui32DstBuf,MEM_BUFFER_SIZE);
        uDMAChannelEnable(UDMA_CHANNEL_ADC0);
    }
}

void ADC01_IntHandler()
{
	ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS1);

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)
    {

    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO1),g_ui32DstBuf1,MEM_BUFFER_SIZE);
        uDMAChannelEnable(UDMA_CHANNEL_ADC1);
    }
}

void ADC02_IntHandler()
{
	ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS2);

    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC2 | UDMA_PRI_SELECT);

    if(ui32Mode == UDMA_MODE_STOP)
    {

    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC2 | UDMA_PRI_SELECT,UDMA_MODE_AUTO,(void *)(ADC0_BASE + ADC_O_SSFIFO2),g_ui32DstBuf2,MEM_BUFFER_SIZE);
        uDMAChannelEnable(UDMA_CHANNEL_ADC2);
    }
}

void uDMAErrorHandler(void)
{
 uint32_t ui32Status;
 ui32Status = uDMAErrorStatusGet();
 if(ui32Status)
 {
 uDMAErrorStatusClear();
 }
}



int main(void) {
	sysclk();
	SADC_Init();

while(1)
{
	
}
}

    after that i have more calculation on adc and use i2c, spi,uart etc within this

  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek

    Which device are you using? TM4C129x or TM4C123x!!!
  • 0 in reply to Amit Ashara
    Expert 1135 points
    hI Amit,

    Its TM4C1294NCPDT
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points

    Hello Prateek,

    The clock configuration function was incorrect,

    void sysclk()

    {

    SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_25MHZ);

    SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |

    SYSCTL_CFG_VCO_480), 120000000);

    }

    The function SysCtlClockSet is for TM4C123x device. I have attached a modified code for interrupt. Please use this as a base (I have not compiled or tested it so some work is needed on your side)

    Fullscreen 7750.main.c Download 
    #include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <math.h>
#include "inc/hw_memmap.h"
#include "inc/hw_adc.h"
#include "inc/tm4c129xnczad.h"
#include "driverlib/sysctl.h"
#include "driverlib/pin_map.h"
#include "driverlib/gpio.h"
#include "driverlib/adc.h"
#include "driverlib/interrupt.h"

#define MEM_BUFFER_SIZE 16
#define SCAN_BUFFER_SIZE 16
static uint32_t g_ui32DstBuf[MEM_BUFFER_SIZE];
static uint32_t g_ui32DstBuf1[MEM_BUFFER_SIZE];
static uint32_t g_ui32DstBuf2[MEM_BUFFER_SIZE];
static uint32_t g_ui32ScanBuf[SCAN_BUFFER_SIZE];

static uint32_t ui32Mode;

uint32_t pui32ADC0Value[8];
uint32_t pui32ADC1Value[4];
uint32_t pui32ADC2Value[4];
volatile uint8_t ui8ADCConvStat;

void sysclk()
{
	SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
			SYSCTL_CFG_VCO_480), 120000000);
}


  void SADC_Init()
    {
	    ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 8);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
	    //SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
	    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
	    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |GPIO_PIN_7);
	    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);
	    GPIOPinTypeADC(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5);
	    GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
	   // GPIOPinTypeADC(GPIO_PORTK_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 |GPIO_PIN_3);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
        ADCSequenceStepConfigure(ADC0_BASE, 0,  0, ADC_CTL_CH0 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  1, ADC_CTL_CH1 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  2, ADC_CTL_CH2 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  3, ADC_CTL_CH3 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  4, ADC_CTL_CH4 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  5, ADC_CTL_CH5 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  6, ADC_CTL_CH6 );
        ADCSequenceStepConfigure(ADC0_BASE, 0,  7, ADC_CTL_CH7 | ADC_CTL_IE );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  0, ADC_CTL_CH8 );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  1, ADC_CTL_CH9 );
        ADCSequenceStepConfigure(ADC0_BASE, 1,  2, ADC_CTL_CH10);
        ADCSequenceStepConfigure(ADC0_BASE, 1,  3, ADC_CTL_CH11| ADC_CTL_IE);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  0, ADC_CTL_CH12);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  1, ADC_CTL_CH13);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  2, ADC_CTL_CH14);
        ADCSequenceStepConfigure(ADC0_BASE, 2,  3, ADC_CTL_CH15| ADC_CTL_IE);// | ADC_CTL_END);

		ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_PROCESSOR, 0);
		ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_PROCESSOR, 1);
		ADCSequenceConfigure(ADC0_BASE, 2, ADC_TRIGGER_PROCESSOR, 2);
		ADCReferenceSet(ADC0_BASE, ADC_REF_INT );//ADC_REF_EXT_3V);

		ADCSequenceEnable(ADC0_BASE, 0);
		ADCSequenceEnable(ADC0_BASE, 1);
		ADCSequenceEnable(ADC0_BASE, 2);
        
        ADCIntEnable(ADC0_BASE, 0);
        ADCIntEnable(ADC0_BASE, 1);
        ADCIntEnable(ADC0_BASE, 2);

		IntEnable(ADC_INT_SS0);
		IntEnable(ADC_INT_SS1);
		IntEnable(ADC_INT_SS2);

		IntMasterEnable();


}


void ADC00_IntHandler()
{
    ADCIntClear(ADC0_BASE, 0);
    ADCSequenceDataGet(ADC0_BASE, 0, pui32ADC0Value);
    ui8ADCConvStat |= 0x1;
}

void ADC01_IntHandler()
{
    ADCIntClear(ADC0_BASE, 1);
    ADCSequenceDataGet(ADC0_BASE, 1, pui32ADC1Value);
    ui8ADCConvStat |= 0x2;
}

void ADC02_IntHandler()
{
    ADCIntClear(ADC0_BASE, 3);
	ADCSequenceDataGet(ADC0_BASE, 3, pui32ADC3Value);
    ui8ADCConvStat |= 0x4;
}


int main(void) {
	sysclk();
	SADC_Init();

while(1)
{
    ADCProcessorTrigger(ADC0_BASE, 0);
    while(ADCBusy(ADC0_BASE));
    ADCProcessorTrigger(ADC0_BASE, 1);
    while(ADCBusy(ADC0_BASE));
    ADCProcessorTrigger(ADC0_BASE, 2);
    while(ADCBusy(ADC0_BASE));
    
    while(ui8ADCConvStat != 0x7);
	ui8ADCConvStat = 0x0;
}
}

  • 0 in reply to Amit Ashara
    Expert 1135 points
    HI Amit,

    thanks for this, i get my point where i was done mistake.
    now i think you remove dma within adc which is also mandatory for my design.
  • 0 in reply to Prateek27
    TI__Guru**** 244440 points
    Hello Prateek,

    First get interrupts working. Without interrupts how can you be certain that DMA is working or not?