Hi TI team,
I need some clarifications about the ECC mechanisms in the TMS570LC4357
a) is my understanding of the ECC SECDED on data for the RAM is good ? :
- for R/W access in 32-bit, 16-bit, or 8-bit access size on the RAM ECC is performed by the L2RAMW module
- in case of Write Single-bit-error, the ESM interrupt Group 1 Channel 26 (L2RAMW - correctable error) will trigger
- in case of Write/Read Multiple-bit-error, the nERROR pin will be activated (ESM 3.3
- for R/W access in 64-bitaccess size, ECC is performed by the Cortex-R4F
- in case of Write/read single-bit-error, the ESM interrupt 1.4 will be triggered
- in case of Write/read multiple-bit-error, the ESM interrupt 2.21 will be triggered
so if i want to be able to monitor read single-bit-errors, i have to access my ram in 64-bit access size to get the ESM interrupt 1.4
b) what happens once I read a data in RAM with a single-bit-error corrected by the ECC ?
- does the data is corrected inside the RAM memory ?
or
- does the data is not corrected inside the RAM memory but corrected each time i access it ? (i know about the EPC purpose to store the address of correctable errors to avoid repeated ECC errors on the same address)
c) I also want to use the EPC to monitor my correctable errors. will this bit of code work ? (I'm using HalCoGen generated project)
uint64_t read_value epcCAMInit(); // reset all cam entry to 'available' read_value = *(uint64_t *) 0x0800BEEF; // read data for(i=0;i<32;i++) // for each CAM_index { if(epcCheckCAMEntry(i) == false) // if CAM_index occupied { if(epcREG1->CAM_CONTENT[i] == 0x0800BEEF) // verify if error address is the one we just read { printf("data at address 0x0800BEEF was corrected by SECDED\n"); } } }
d) Will the same mechanism will work for FLASH ECC error monitoring ? if i access FLASH with 64-bit access size, will the Cortex-R5F do the ECC SECDED instead of the L2FMC?
e) same as d) with EMIF
f) I heard about a HARD ERROR CACHE but I can't find it on the TRM.
in the case of a correctable error detected in flash, is the corrected data stored inside some cache ? and if it is, how do I clear this cache to have the error again ?
g) is there some example code for ECC error injection in RAM, FLASH and EMIF ?
thanks in advance
Benjamin,