Gentlemen,
I just wrote code to read 32 bit values from an SPI sensor, using the "old style" 2 wire MISO/MOSI. Given the limitation of 16bit FIFO and configuration parameters, this is what is working well for me:
GPIOPinWrite(GPIOFSSBase,GPIOFSSPin,0); // Lower CSB SSIDataPut(SSI0_BASE, frameHigh); // Sends only the upper 16 bits while(SSIBusy(SSI0_BASE)); SSIDataGet(SSI0_BASE, &readCrap); // Read useless data SSIDataPut(SSI0_BASE, (frameLow)); // This sends the other 16 bits while(SSIBusy(SSI0_BASE)); GPIOPinWrite(GPIOFSSBase,GPIOFSSPin,GPIOFSSPin); // Raise CSB SSIDataGet(SSI0_BASE, &readCrap); // Read useless data GPIOPinWrite(GPIOFSSBase,GPIOFSSPin,0); // Lower CSB SSIDataPut(SSI0_BASE, frameHigh); // Flush 16 more bits while(SSIBusy(SSI0_BASE)); // Wait for bits to be flushed out SSIDataGet(SSI0_BASE, &read16High); // Read 16 bits SSIDataPut(SSI0_BASE, frameLow); // Flush 16 more bits while(SSIBusy(SSI0_BASE)); // Wait for bits to be flushed out SSIDataGet(SSI0_BASE, &read16Low); // Read more data GPIOPinWrite(GPIOFSSBase,GPIOFSSPin,GPIOFSSPin); // Raise CSB
I wonder if you have any more efficient suggestions? The while()'s are probably not the most elegant solution. But at 8MHz SPI communication, I'm not sure it would be worth the trouble of trying to implement DMA's or even interrupts... Anyone willing to share experience?
The SPI configuration is at 8MHz, and the clock on the TM4C1294 is at 120Mhz. FSS is controlled by software for there are more sensors on the same data lines. For what is worth, the above lines take 11us to complete (no optimizations).
By the way, I guess there's a lot of legacy motives for such, but ain't it counterintuitive to implement 16bit FIFO's on a 32bit part?
