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[USB] How to check the end of Setup/Data/Status stage?

Leonardo Chiodi
Intellectual 290 points

Hi all,

On those days I'm trying to study the usb protocol, applied to the TivaC MCU, but I have a little doubt, and hope a brainstornming from the community.

I'm trying to understand if there is a bit, a register or some trick in the TivaC mcu to detect the end of an USB stage.

I mean: How can I detect the end of the Setup stage? The start of the setup stage itself is simple, I can check USBIF register to get the SOF bit updated, or the frame count to check if the count goes up, but for the end of the same stage?

Let's try to figure out this situation: I'm in the SET_ADDRESS request in the StandardRequest, ok? I got my new address from the host, but I can't update the mcu USBFADDR register, because before I need the relative IN-setup stage from the host itself, to reply with a ZLP to ensure that all the SET_ADDRESS requests got success.

How can I detect the end of the previous setup stage (the OUT stage, where the host sent me the new address)?

Does I need just to wait for the next stage and check in the bmRequest Type if this last one is an IN Stage?

Is this one, the only way?

Thanks

  • 0
    TI__Guru**** 244440 points
    Hello Leonoardo

    That is not possible. USB peripheral takes care of a lot of overheads and extracts the data for user processing. Any request type of IN is processed by the IN endpoint.
  • 0 in reply to Amit Ashara
    Intellectual 290 points
    Ok that's clear, thank you.
    And now, please another question.
    When every transfer is complete, i got the FIFO buffer full, ok?
    When i want to get my datas, which is the behaviour of the buffer?
    When I access and get my first byte of data, the FIFO just goes on erasing the first byte, and providing the second one, and then the third one and so on... or whenever I access to the buffer I get all the datas every time from the first one?
    This is a doubt beacuse, usually whenever I access a FIFO buffer, it erase the byte that every time I extract
  • 0 in reply to Leonardo Chiodi
    TI__Guru**** 244440 points
    Hello Leonardo

    The USB FIFO is a programmable size buffer. So the guideline is to keep twice the size of the packet expected. You will not get a FIFO FULL, but a RXRDY status indicating data packet is available. When the CPU reads the data from the FIFO, it would read it in byte sizes and never all of the data. When you read a byte the address pointers get updated, there is no need to erase anything.
  • 0 in reply to Amit Ashara
    Intellectual 290 points
    For sure, I don't erase nothing, but I didn't understood what you mean as " the address pointers get updated".
    That was my trouble, whenever I access the buffer, the pointer goes on and, when I access for the second, third, fourth time, I lost the previous datas, or could be possible to revert the pointer to te previous positions?

    Thanks
  • 0 in reply to Leonardo Chiodi
    TI__Guru**** 244440 points
    Hello Leonardo

    A FIFO works by manipulating the read and write pointers. When a data is written the write pointers increment till it reaches the read pointer where no more data can be written. When a data is read the read pointers increment till it reaches the write pointer, when no more data can be read. Reverting pointers is never expected in a FIFO. If that were to be the case then a standard SRAM with software manager pointers must be used. This however is not the case for most FIFOs.

    en.wikipedia.org/.../FIFO_(computing_and_electronics)