DAP error (Error -1170 @ 0x0)

David Chance

Hi there,

I am trying to debug a second design based on 1294. I am using the latest CCS and Windows 10, and I use both Olimax and Spectrum Digital's XDS100V3

I tried it on two home made boards, which are running on 250ppm 25Mhz clock source instead of the normal 50ppm crystal (could this be the problem? I may have missed it but I did't find any spec on this issue)

After the program is flashed in, it has about 50/50 chance to start properly.

when it fails, CCS shows the following error:

Error connecting to the target:
(Error -1170 @ 0x0)
Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).

Where should I look into to track down this problem?

Thanks!

over 9 years ago

0 Amit Ashara over 9 years ago

TI__Guru**** 244440 points

Hello David,

The Technical document on JTAG was written specifically to correctly interface. Can you please refer to the section 6 on isolating a failing debug connection.

www.ti.com/.../spma075.pdf

If you are not able to isolate the issue, then please share your schematic for a review.

0 cb1 over 9 years ago

Guru 47900 points

Would it not make (great) sense to change to the proper crystal & bypass caps - and test/observe?

0 Amit Ashara over 9 years ago in reply to cb1

TI__Guru**** 244440 points

Hello cb1

I believe a second set of review of the schematics (and maybe layout) would be important.

0 cb1 over 9 years ago in reply to Amit Ashara

Guru 47900 points

Hi Amit,

Surely - yet I "keyed" on the fact that poster reported "50/50 chance" of his program running. This suggests that he (may) be, "Most of the way there" and that he recognizes his deviation from "normal" xtal spec...

0 Amit Ashara over 9 years ago in reply to cb1

TI__Guru**** 244440 points

Hello cb1

Yes it could very well be, but we need to keep all debug options open.

0 David Chance over 9 years ago in reply to Amit Ashara

Genius 4775 points

I think the problem is not in JTAG against the micro running on 250 ppm clock source, but because the 250 ppm clock source will drive the ethernet interface crazy (ethernet clock's IEEE spec is only 50ppm, I believe) and locks up the micro so that the JTAG connect is lost.

0 Amit Ashara over 9 years ago in reply to David Chance

TI__Guru**** 244440 points

Hello David

Have you been able to confirm the same?

0 David Chance over 9 years ago in reply to Amit Ashara

Genius 4775 points

After I separate the clock source and use 50ppm on ethernet, it seems to work reliably

0 cb1 over 9 years ago in reply to David Chance

Guru 47900 points

Might you further detail?

The MCU does not immediately transition into ethernet communication - is not that true? And - if that's so - and you cannot establish JTAG commo (prior) to ethernet's onset - such seems to (lessen) ethernet's role in JTAG's (initial) interruption...

0 David Chance over 9 years ago in reply to cb1

Genius 4775 points

When I said "After the program is flashed in, it has about 50/50 chance to start properly.", it was a little misleading since I didn't give enough detail, what I meant was I can flash in and the debugger stays in the first line, when I tried to run it, it had 50/50 chance to allow me to pause via JTAG and examine the codes, the other 50/50 is the JTAG error I mentioned.

0 Amit Ashara over 9 years ago in reply to David Chance

TI__Guru**** 244440 points

Hello David,

So if the JTAG allowed you to pause, was there a pattern to it? Or could it have been a weak solder on the crystal.

0 David Chance over 9 years ago in reply to Amit Ashara

Genius 4775 points

When JTAG allows me to pause, everything works fine. I don't think I have issue anymore

0 Amit Ashara over 9 years ago in reply to David Chance

TI__Guru**** 244440 points

Hello David,

OK. But the issue still warrants debug as to why 250 ppm clock is causing an issue. Are you using the on-chip Ethernet PHY?

0 David Chance over 9 years ago in reply to Amit Ashara

Genius 4775 points

Yes, I was using the on-chip PHY

0 David Chance over 9 years ago in reply to Amit Ashara

Genius 4775 points

If I use the 250ppm clock and USB, without Ethernet, the JTAG didn't seem to give me any problem (USB clock has a much higher tolerance than Ethernet's), so I concluded the 250ppm is not affecting JTAG but Ethernet, and the Ethernet error results in JTAG problem further in the line

0 Amit Ashara over 9 years ago in reply to David Chance

TI__Guru**** 244440 points

Hello David

If the Ethernet is not being used then this should not be a problem. Is the RBIAS pin populated?

0 David Chance over 9 years ago in reply to Amit Ashara

Genius 4775 points

Yes, RBIAS is always populated

0 Amit Ashara over 9 years ago in reply to David Chance

TI__Guru**** 244440 points

Hello David,

Then I don't think the 250ppm clock should have been an issue, as neither the Ethernet is being used and the RBIAS is all OK.

0 David Chance over 9 years ago in reply to Amit Ashara

Genius 4775 points

That's what I said, no problem if Ethernet was not in used. Maybe I mislead you again....

0 Amit Ashara over 9 years ago in reply to David Chance

TI__Guru**** 244440 points

Hello David,

Sorry, I didn't get the same. I thought Ethernet was not being used.

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DAP error (Error -1170 @ 0x0)