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TMS570LC4357 - Cache direct access

Benjamin GREFFE
Prodigy 185 points

Other Parts Discussed in Thread: TMS570LC4357

Hi TI Community,

 

I am currently using a TMS570LC4357 and I'm using CCS to generate and load my software.

 

I want to know if it's possible to access directly the cache.

I want to use the 64kb of cache as a simple memory.

 

I tried to access the zone directly but any read access causes an abort error.

 

I am aware of these chapters in the Cortex-R5F TRM :
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0460c/Babhieaj.html
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0460c/CIAEADIH.html

 

but I cant figure what to do with these informations in my code.

 

here my unsuccessful try to enable AXI access

     asm(" MRC p15, #0, r1, c1, c0, #1");   // Read Auxiliary Control Register

     asm(" ORR R1, R1, #0x1 <<24");         // Ensure ACP is idle, that is. cannot access the cache and that no new ACP transactions can be generated

     asm(" DSB");

     asm(" MCR p15, #0, r1, c1, c0, #1");   // enabled AXI slave accesses to the cache RAMs

     asm(" ISB");

 

Is it possible ?

and

How to do it ?

 

thanks,

 

Benjamin