Hi,
I am working on RM57L843 device DMA with SCI.
I am able to transfer 260 bytes of data with DMA and also able to receive the 260 bytes of data with DMA.
My Setup:
1.Configured DMA ch-0 to SCI3 transmit
2.Configured DMA ch-1 to SCI3 receive.
3.enabled DMA RX and DMA TX in SCI3
4.transmit control packet initialization below
dmaReqAssign(DMA_CH0, DMAREQ_SCI3_TX);
/*Configure control packet for Channel 0 for transmit */
g_dmaSci3TxCTRLPKT1.SADD = ((uint32_t) (&u8_sci3TxData[1])); /* source address which is nothing but RAM location */
g_dmaSci3TxCTRLPKT1.DADD = (uint32_t) (&(sciREG3->TD)); /* destination address which is nothing but Buffer register */
g_dmaSci3TxCTRLPKT1.CHCTRL = 0; /* channel control */
g_dmaSci3TxCTRLPKT1.FRCNT = (SIZE - 1U); /* frame count */
g_dmaSci3TxCTRLPKT1.ELCNT = 4U; //SIZE; /* element count */
g_dmaSci3TxCTRLPKT1.ELDOFFSET = 0; /* element destination offset which is nothing but Buffer register */
g_dmaSci3TxCTRLPKT1.ELSOFFSET = 0U; /* element Source offset which is nothing but RAM location */
g_dmaSci3TxCTRLPKT1.FRDOFFSET = 0; /* frame destination offset */
g_dmaSci3TxCTRLPKT1.FRSOFFSET = 1U; /* frame Source offset */
g_dmaSci3TxCTRLPKT1.PORTASGN = PORTA_READ_PORTB_WRITE; //Data RAM to SCI TX register
g_dmaSci3TxCTRLPKT1.RDSIZE = ACCESS_8_BIT; /* read size */
g_dmaSci3TxCTRLPKT1.WRSIZE = ACCESS_8_BIT; /* write size */
g_dmaSci3TxCTRLPKT1.TTYPE = FRAME_TRANSFER; /* transfer type */
g_dmaSci3TxCTRLPKT1.ADDMODERD = ADDR_OFFSET; /* address mode read */
g_dmaSci3TxCTRLPKT1.ADDMODEWR = ADDR_OFFSET; /* address mode write */
g_dmaSci3TxCTRLPKT1.AUTOINIT = AUTOINIT_OFF; /* autoinit */
/*Set control packet for channel 0 */
dmaSetCtrlPacket(DMA_CH0, g_dmaSci3TxCTRLPKT1);
/*Set Priority for channel-0*/
dmaSetPriority(DMA_CH0, HIGHPRIORITY);
/*Set dma channel 0 trigger on hardware request*/
dmaSetChEnable(DMA_CH0, DMA_HW);
5.Receive control packet initialization:
dmaReqAssign(DMA_CH1, DMAREQ_SCI3_RX);
/*Configure control packet for Channel 1*/
g_dmaSci3RxCTRLPKT2.SADD = ((uint32_t) (&(sciREG3->RD))); /* source address which is nothing but RAM location */
g_dmaSci3RxCTRLPKT2.DADD = ((uint32_t) (&u8_sci3RxData[0])); /* destination address which is nothing but RAM location*/
g_dmaSci3RxCTRLPKT2.CHCTRL = 0; /* channel control */
g_dmaSci3RxCTRLPKT2.FRCNT = SIZE; /* frame count */
g_dmaSci3RxCTRLPKT2.ELCNT = 4U; /* element count */
g_dmaSci3RxCTRLPKT2.ELDOFFSET = 0U; /* element destination offset */
g_dmaSci3RxCTRLPKT2.ELSOFFSET = 0U; /* element Source offset */
g_dmaSci3RxCTRLPKT2.FRDOFFSET = 1U; /* frame destination offset */
g_dmaSci3RxCTRLPKT2.FRSOFFSET = 0U; /* frame source offset */
g_dmaSci3RxCTRLPKT2.PORTASGN = PORTB_READ_PORTA_WRITE;
g_dmaSci3RxCTRLPKT2.RDSIZE = ACCESS_8_BIT; /* read size */
g_dmaSci3RxCTRLPKT2.WRSIZE = ACCESS_8_BIT; /* write size */
g_dmaSci3RxCTRLPKT2.TTYPE = FRAME_TRANSFER; /* transfer type */
g_dmaSci3RxCTRLPKT2.ADDMODERD = ADDR_OFFSET; /* address mode read */
g_dmaSci3RxCTRLPKT2.ADDMODEWR = ADDR_OFFSET; //ADDR_INC1; /* address mode write */
g_dmaSci3RxCTRLPKT2.AUTOINIT = AUTOINIT_OFF; /* autoinit */
/*Set control packet for channel 1*/
dmaSetCtrlPacket(DMA_CH1, g_dmaSci3RxCTRLPKT2);
/*Set Priority for channel-0*/
dmaSetPriority(DMA_CH1, HIGHPRIORITY);
/*Set dma channel 0 trigger on hardware request*/
dmaSetChEnable(DMA_CH1, DMA_HW);
6.Enabled DMA
7.Sent first byte sci3TxData[0] through CPU using SCIsend(); function generated by the HALCOGEN.
For the first time I am able to send data from sci3TxData[] to sci3RxData thru DMA.I mean DMA is able to read data from RAM sci3TxData and placed the data in SCI->TD register and DMA is able to read data from SCI->RD and write into sci3RxData RAM location.
But if I run the same in continuous loop say while(1) it is not working.
here is action I am doing in while(1)
while(1)
{
/* Filling data in TX buffer */
for (u16_cnt = 0; u16_cnt < SIZE; u16_cnt++) {
u8_sci3TxData[u16_cnt] = u16_cnt + 1;
}
/*Clear RX buffer*/
for (u16_cnt = 0; u16_cnt < SIZE; u16_cnt++) {
u8_sci4RxData[u16_cnt] = 0;
}
v_sciSendData(UART3, &u8_sci3TxData[0], 1); /* send first byte to start the dma transaction */
while (dmaGetInterruptStatus(DMA_CH0, BTC) != TRUE)
{
}
dmaREG->BTCFLAG = (uint32)((uint32)1U << 1U); //Clearing dma BTC flag
/*Set dma channel 0 trigger on hardware request*/
dmaSetChEnable(DMA_CH0, DMA_HW);
/*Set dma channel 1 trigger on hardware request*/
dmaSetChEnable(DMA_CH1, DMA_HW);
for (u16_cnt = 0; u16_cnt < SIZE; u16_cnt++)
{
if (u8_sci3TxData[u16_cnt] != u8_sci3RxData[u16_cnt])
{
break;
}
}
if (u16_cnt < SIZE)
{
v_sciDebugPrint(u16_cnt,"Fail u16_cnt");
}
else
{
v_sciDebugPrint(u16_cnt,"PASS");
}
}
For the first time I am able to see PASS but when I run continuously FAIL is showing.
To run dma continoulsy what other settings need to be done?
After first transmission and receiption in DMA what will happen to SOurce addresss ,destination address,frame index pointer,element index pointer?
After first transmission and reception done successfully,If I have to start dma with the same RAM location where sci3TxData,sci3RxData buffer what else need to be taken care.
Can anyone please guide me.
With regards,
Praveen
