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Dhrystone MIPS

I am really confused with this dhrystone concept...

Let say if the clock frequency of a CPU is 4MHZ and instructions per cycle is 1, then the no.of MIPS is equal to 4

Now this 4MIPS is equal to how many dhrystone MIPS??

And what is the need for this notation??? I am seeing this in recent ARM controllers like TMS570 etc etc...

  • Per the ARM forum post, "What is Dhrystone MIPS? How is it different from normal MIPS and how do we calculate it?" (see link below), there's no set conversion between MIPS and Dhrystone MIPS (DMIPS) as it must be measured. DMIPS is intended to be a more meaningful metric that indicates performance capability as opposed to a strict number of instructions per second. It's based on the time it takes to execute the benchmark on a given system compared to the execution time on a VAX 11/780.

    For more information the ARM forum post can be found here:
    http://forums.arm.com/index.php?showtopic=14270

  • For a single issue MCU, you for the most part correct that peak MIPS = peak MHz.  Keep in mind that the Cortex R4F used in the TMS570 line can dual issue many instructions, and as such it would be expected to have MIPS> MHz for most software benchmarks.

    Regarding Dhrystone, ARM has elected to use this as a common reference benchmark for all of their CPUs.  The DMIPS/MHz numbers provide an easy way to evaluate the efficiency of performance when comparing one ARM core to another ARM core.  Compiler, conditions of use, etc. are all held constant to give best comparison of CPUs.

    If you wish to calculate the number yourself, you can download the Dhrystone 2.1 code and run on your favorite test platform.  Performance is generally normalized to Dhrystone MIPS, or DMIPS.  1 Dhrystone MIP= 1757 Dhyrstones, the performance of a 1 MIPS VAX 11/780 - a common high performance machine available when the benchmark was released over two decades ago.

     

  • Could you please give an example for this measurement?

    Consider TMS470..How should we perform this test?

  • The process is fairly easy.

    1. Download Dhrystone 2.1 C source code from internet. 
    2. Compile the benchmark code for a TMS570 target
    3. Execute the benchmark on target hardware
    4. The benchmark result will be the number of "Dhrystones" for the hardware. Divide this number by 1757 to obtain Dhrystone MIPS (DMIPS). 

    Keep in mind that hardware configuration (# of wait states, flash wrapper prefetch, ARM or Thumb-2 mode, etc.), compiler used, and compile options used can have a large impact on the results.