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ECK1 clock selection

Tom Wittkop24
Intellectual 310 points
Other Parts Discussed in Thread: TMS570LC4357

We are in the process of troubleshooting an issue and would like to select VCLK to output on the ECLK1 pin of the TMS570LC4357.  Table 6-18 in the datasheet lists the Clock Test Mode Options for Signals on ECLK1.  SEL_ECP_PIN is defined as a 5 bit field, CLKTEST[4-0]. However the Clock Test Register in table 2-50 of the reference manual only provides a 4 bit field for SEL_ECP_PIN.  Is this an error in the reference manual?

Is there sample code available to set up the ECLK1 pin?

  • 0
    TI__Guru**** 191906 points
    Hi Tom,
    The datasheet is correct. The TRM needs to be corrected. There is an enhancement to the CLKTEST register to extend from from 4 bits (as in other Hercules devices) to 5 bits.

    If you simply just want to output VCLK on ECLK1, you will:

    1. Set the SYSPC1 to 1 to enable ECLK1 pin in functional mode. By default the ECLK1 is in GIO mode.
    2. Adjust the ECPDIV field of the ECPCNTL register in the SYS module. By default it has a value of 7 which is VCLK/8. For example, if you want to output VCLK/1 then you will set the ECPCNTL to 0.
  • 0 in reply to Charles Tsai
    TI__Guru**** 191906 points

    Sorry, a typo on #2.

    2. Adjust the ECPDIV field of the ECPCNTL register in the SYS module. By default it has a value of 7 which is VCLK/8. For example, if you want to output VCLK/1 then you will set the ECPDIV to 0.

  • 0 in reply to Charles Tsai
    Intellectual 310 points
    We were able to program the VCLK to output on the ECLK1 pin, however the ECPDIV field seems to not have an effect on the output frequency.
  • 0 in reply to Tom Wittkop24
    TI__Guru**** 191906 points
    Hi Tom,
    I tried it myself in the debugger. In the registers window I change the SysPC1 to 1 and I immediately I see a 15MHz ECLK output. When I change the ECPDIV from 7 to 0 I see the ECLK output become 75MHz. The LC4357 CPU runs at 300MHz. The GCLK:HCLK:VCLK = 1:2:2 and hence the VCLK=300/4 which is 75MHz when ECPDIV=0.

    What VCLK frequency do you see? Do you have another board or chip that you can try the same? After you write to the ECPDIV, can you read it back to make sure that write was completed. I just want to make sure the write was successful.