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how to do the cpu self-testing and fault injection test?

Shuai Peng
Intellectual 780 points
Other Parts Discussed in Thread: TMS570LS3137, HALCOGEN

The ESM module of TMS570 can do the CPU self-testing, GROUP2 and GROUP3 are not controlled by the user, GROUP1 can be configured by the user, the current problem is as follows:

How does user know that the cpu self-testing of the three groups are working properly ?

And my customer has a security certification needs, how to do the fault injection test?

  • 0
    TI__Guru 72500 points

    Hello Shuai Peng,

    First, let me clarify, and this may just be a language thing, the ESM does not do CPU self-testing. The ESM module just collects the error signals and routes them to the nERROR pin, flag registers or interrupts. The nERROR pin function can be tested as described in the TRM. You did not mention which TMS570 device you are interested in, but see section 12.2.3 of SPNU499B for the TMS570LS3137 for example.

    The STC controller and the CPU compare module actually do CPU self-testing. See chapters 8 and 9 of the same document, SPNU499B.

  • 0 in reply to Bob Crosby
    TI__Intellectual 780 points

    Hi Bob,

    Thanks for your reply.Sorry for my poor english.

    ESM collect error messages and record which channel is triggered in the ESM interrupt function.

    Now my customer's  problem is how to prove that the protection logic and ESM module can catch the error when the CPU really abnormal.

    For example,they want to ensure if ESM can capture FLASH ECC single bit error, so the first thing is made a mistake in this(namely fault injection), the

    problem is how to do the fault injection? Do we have some documents explain this or have some libraries or authenticated example code?

  • 0 in reply to Shuai Peng
    TI__Guru 72500 points

    The best place to start is to use the safety self checks available in HALCoGen. Here is a picture of the different diagnostics that can be included for the TMS570LS3137: