Other Parts Discussed in Thread: TM4C129XNCZAD
Hello,
I'd like to ask a few questions about TM4C1294NCPDT CPU:
1. It's was not so clear when I read description about registers Unique ID 0-3.
Which one is first in a 128 bit word? The data sheet and another sources of info does not provide any details about this one.
2. A description of reg DID1 in data sheet does not match with a description in the file \SW-EK-TM4C1294XL-2.1.3.156\inc\hw_sysctl.h
(for example PINCOUNT (Package Pin Count) ) and the comment looks like some joke)) : #define SYSCTL_DID1_VER_1 0x10000000 // fury_ib
3. Why TI does not provide any information about DWT Unit (Data Watchpoint and Trace)
In this case I have to use information from ARM "ARM® Cortex®-M4 Technical Reference Manual Rev. r0p1" but it's common description for whole family Cortex®-M4.
I'd like to use DWT_CYCCNT counter for creating DELAY function and I need more info how use.
As result work my software I have figured out that TM4C1294NCPDT has at least 2 register:
DWT_CTRL - has value 0x40000001 (it is not match with list of possible reset values in accordance with description "ARM® Cortex®-M4 Technical Reference Manual Rev. r0p1")
DWT_CYCCNT - an counter which starts to work immediately after RESET from debugger in debug mode but it does not work in regular working mode.
I guess it needs some initialization but no info how to do this one.
I'll appreciate any help in this one.
Thanks a lot!
Vasili