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ERROR signal output

Other Parts Discussed in Thread: TMS570LS3137

I'm reading "TMS570LS31x/21x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual (Literature Number: SPNU499B)".

And I using "TMS570LS3137".

I want to output ERROR signal with Group:1 Channel:27.

"ESM Interrupt Enable Set/Status Register 1 (ESMIESR1)" is set to 0x08000000U.

But ERROR signal is not output even if failure of LBIST occurs.(ESM ERROR Pin Status Register (ESMEPSR) is leave as 1).

Do you have anything else to setting ?

  • Group 1 ESM flags do not automatically drive the ERROR\ pin active. They must be configured to do so.
    Please see Figure 12-1 and table 12-1 in the technical reference manual SPNU499
  • Thank you your answer.

    I configured by "ESMEEPAPR1" and "ESMIEPSR4" register.

    I set it as follows.

     esmREG->EEPAPR1 = 0x08000000U;

    I would be happy if you give me advice.

    Best Regards.

  • Hi Arriy,

    I'm not sure I understand the last question.
  • I carried out fault injection test with LBIST.
    In this test, I want to check that the error flag is set and ERROR signal is output.

    I confirmed that the ESM error flag(Group:1 Channel:27) is set,
    but, ERROR signal is not output. ESM ERROR Pin Status Register (ESMEPSR) is leave as 1.

    I configured by "ESMEEPAPR1" register.
    esmREG->EEPAPR1 = 0x08000000U;

    Do you know anything about the ERROR signal is not output ?
  • The nERROR pin can be reset to high after an error occurs, see section 12.2.2, for example Figure 12-5. ERROR Pin Timing - Example 2. Look for some software that writes to the ESMEKR.. that is how you can reset the Error pin inactive.

    Also see Figure 12-8. ERROR Pin Timing - Example 5 because this case may behave differently than you would expect.
    (the error pin reset request can come *before* the error but is delayed until the error occurs..)
  • Hi Anthony,

    Thank you your answer.

    I can't understand..I'm Sorry.

    Does the ERROR pin not output with my system cause is unknown ?

    Should I reset the ERROR terminal after fault injection?

    Best Regards.

  • Arriy,

    The comment is simply that the error pin may be configured to pulse low for a short time rather than drive a steady low level.

    This is especially true for testing diagnostics;  I believe the companion power supply chip can sense the pulse to tell you that the error reporting path is in tact, but can be set to ignore pulses within a short window so that the diagnostic doesn't actually shut the system down.   The chapter on ESM talks about the pulse behavior.

    Point is you need to consider that the test may be pulsing the nERROR pin rather than driving it steadily and you should consider that when trying to check for the nERROR assertion.   A software check of the pin may totally miss a pulse for example.....

    -Anthony