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Question about an old discontiued MPU LM4F120H5QR

I'm working with an LM4F120H5QR MPU and I'm reading the old datasheet. TI document number DS-LM4F120H5QR-SPMS294G. In reading the description of how to access the GPIO modules and the access addressing. On page 618 there is a description provided for "Initialization and Configuration" which starts out saying: " The GPIO modules may be accessed via two different memory apertures." and then at the end of this paragraph it says: "Note that GPIO can only be accessed through the AHB aperture."

So my question is which of the two statements given in the datasheet is correct. Can I access the GPIO modules via either the Advanced Peripheral Bus and/ or the Advanced High-Performance Bus, or can I only access the GPIO modules via the Advanced High-Performace Bus as given at the end of the paragraph?

  • Hello Brian,

    Some of the GPIO ports have AHB aperture only while some of them have both AHB/APB aperture. The setting for the same is in GPIOHBCTL register in System Control. Once the setting has been done, then based on which port and what setting accesses should be limited to the corresponding AHB or APB address aperture.
  • Thanks for the reply. Could you add to your answer by listing which ports have AHB access only? The section describing the GPIOHBCTL register has the following: "Ports K-N and P-Q are only available on the AHB bus". Is this the reason for the note later on in the GPIO section? Its a bit hard to understand the interaction between these notes, as the actual part only implements ports A -F.

  • My friend - your points are sound - yet your device has been abandoned - cannot be replaced - and vastly superior ones are (now) available.

    So much work/effort upon an already (very) dead horse.

    Note too - that device AVOIDS the key/critical PWM Generators - was this vendor's "first go" @ Cortex M4 - and not an especially compelling one.

    Your switch to TM4C would simplify your tech life and reward you w/"Replacement possibility AND far improved & more capable MCU performance..."

  • Hello Brian

    I think the section describing GPIOHBCTL and the register port map in GPIO section are in agreement. Can you please paste the point to the portion of the datasheet which does not seem to agree.