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TM4C1294NCPDT: PORT definition in header file " TM4C1294NCPDT.h " in Keil IDE.

Gaurav kumar9
Prodigy 60 points
Part Number: TM4C1294NCPDT

Hello

I am just start working on " TM4C1294NCPDT " MCU (wih Keil as my IDE). In header file  " TM4C1294NCPDT.h "  some ports are defined like GPIOA_AHB and others are simple GPION. if i simply manipulate it then it means Port A is on AHB bus and Port N is not. but if i see the datasheet of device then they say.

" Advanced High Performance Bus accesses all ports

– Ports A-H and J; Ports K-N and P-Q "

 

So where i am making a mistake in understand it.

thanks 

 

 

 

  • 0
    TI__Guru**** 244400 points
    Hello Guarav,

    If you look at the data sheet some ports have APB and AHB apertures that can be controlled via the SYSCTL.GPIOHBCTL. For such ports the AHB keyword is used, while for others where such a feature does not exist, the name of the port is used as is. Hope that clarifies.
  • 0 in reply to Amit Ashara
    Prodigy 60 points
    Hello Amit Ashara

    Thanks for your reply. Is this register " SYSCTL.GPIOHBCTL " is available in TM4C1294NCPDT. I ask this because i searched for this register description in TM4C1294NCPDT datasheet, but found nothing. Also as i earlier said in GPIO section they have written

    " Advanced High Performance Bus accesses all ports

    – Ports A-H and J; Ports K-N and P-Q "
  • 0 in reply to Gaurav kumar9
    TI__Guru**** 244400 points
    Hello Gaurav,

    My apologies. On TM4C129x device all ports are now AHB ports unlike TM4C123x devices where some ports were selectable between APB and AHB.
  • 0 in reply to Amit Ashara
    Prodigy 60 points
    Hello Amit ,

    Thanks for your reply. So can i say " GPIOA_AHB " and " GPION " doesn't specify the bus through which CPU access the PORT? why these names are not updated by TI ?

    Because such things mis-lead new comers . ( " TM4C1294NCPDT.h " header file gfor Keil IDE )
  • 0 in reply to Gaurav kumar9
    TI__Guru**** 244400 points
    Hello Gaurav,

    I have to agree to your last statement. But then at the same time, it is TivaWare that makes these changes transparent. By using GPIOx as the base address define, TivaWare remaps them to AHB bus access.
  • 0 in reply to Amit Ashara
    Prodigy 60 points
    hello Amit ashara,

    sorry to take such a long time to reply. Actually i install a setup for tiwaware. In which i got my header file namely " tm4c1294ncpdt.h ". In this header file they also do the same thing. Some ports are defined like this " GPIO_PORTJ_AHB_DATA_R " and few others like this " GPIO_PORTK_DATA_R " . ( i'm agree that address assign to them is AHB bus address but the way in which they representing these addresses are confusing )

    this thing is really confusing when they first write that all ports are on AHB bus and after that they define its address like this way.