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TMDSRM48HDK: Sampling time and discharge time in halcogen and related issue

Manjunathan K
Expert 2825 points
Part Number: TMDSRM48HDK

 I have tried with different combinations of sampling time and discharge time (that only can able to edit in halcogen).

(I have some problem in reading the multiple ADC channels simultaneously. there is a small change in output voltage with the mean difference of +40mV over the period of time. it is creating a lot of impact in my overall result. I am totally using 10 channels. if I connect the digital multimeter to the particular channel the output becomes exact (digital multimeter parallelly connected to ADC input to the controller).)

different trials exercised:

1. for discharge time 100ns and the sampling time of 200ns there is no change in output voltage up to 1 volt and if it exceeds 1 volt there is 40mV error added.

2. for discharge time 400ns and the sampling time of 600ns it gives better result up to 1.5v.

please check the image below

what actually is the relation between sampling time and discharge time.

  • 0
    TI__Guru**** 190406 points

    Hi,

      I think it may something to do with the settling time of the sampling capacitor. What is the external capacitor you use? Can you please take a look at this apps note and try with the appropriate Cext and then see if it makes a difference?

  • 0 in reply to Charles Tsai
    Expert 2825 points

    Hi, Mr.Charles Tsai,

    Thank you,

    I am not using any external capacitor (at the input of ADC ie..connector J4 -- capacitor c28 to c47 in the image below) in the design. it is left not populated. Is that created the problem??. what value should i use. i am not that much expertise in ADC.

  • 0 in reply to Manjunathan K
    TI__Guru**** 190406 points

    Hi,

      Please refer to the table 1 in the app note for recommended Rsource and Cext values.

      Do you notice any improvement if you convert fewer number of channels at a time?

  • 0 in reply to Charles Tsai
    Expert 2825 points

    Yes, Mr. Charles.

    If I convert few channels (Up to 4 channels) the error in the ADC output is very less.

    I have added 10pf capacitor to Cext and also Rpull of 2.2K to the input of ADC. My problem almost cleared up to 80 %, I think. I still need to do few more testings to ensure that there is no crosstalk between the channels and also need to test with the maximum number of ADC inputs that I am going to use in my application.

    Thanks a lot for your continuous support. Will come back to you if I have any other troubles related to it.

    Thaks and regards

    K.Manjunathan

  • 0 in reply to Manjunathan K
    TI__Mastermind 19930 points

    Hello K. Manjunathan,

    The different channels of the ADC are all connected to a common Analog-to-Digital Converter (ADC). The ADC's sampling capacitor is charged or discharged from its initial voltage to a final voltage during the sampling period. That final voltage, achieved at the end of the sampling period, is converted to a digital value by the ADC converter.

    Now, consider the source impedance that is driving the ADC input; it is in series with the sampling capacitance. The source impedance (Rs) and sampling capacitor (Csamp) form an RC-circuit whose time constant is given by Rs*Csamp. In order to get the sampling capacitor to the "same" voltage as the driving voltage, you will need about 9 time constants ("same" voltage implies a voltage that is within 1/2 bit of the target voltage). The method for getting the sampling capacitor charged to the "same" voltage as the driving circuit can be achieved by (1) increasing the sampling time or (2) decreasing the source impedance.

    Placing a capacitor on the pin gives the external capacitor (Cext) the duration between successive samples of the channel to charge fully (as compared to the sampling period for the internal capacitor). In order for the external capacitor to provide adequate charge to the sampling capacitor, the external capacitor needs to be sized so that the shared charge drops the voltage on the external capacitor by less than 1/2 bit. Thus, given a sampling capacitance of 29pF (13pF + 16pF), you should need about 240nF.  You still have RC-time constants to deal with but now the RC time constant is Rs*Cext. You need to verify whether external capacitance fully re-charges in the duration between samples (with your sampling impedance).

    The discharge feature removes the impact of previous conversions. Suppose that on one channel you have a fixed voltage while a second channel varies over the entire voltage range of the ADC. The residual charge on the capacitor will vary for the fixed voltage conversion depending upon what voltage was converted previously on the input channel with variable voltage. The discharge feature starts the conversion at a pre-defined fixed point before each conversion. Thus, the discharge may be useful in some situations (e.g. with a wide range of input voltages) while in other situations (e.g. repetitive conversion of a single, slowly moving input) the discharge is not helpful.

    Best Regards,

    Kevin Lavery