The Rev E data sheet for the TM4C123AE6PM describes "special consideration GPIO pins" on page 595 in table 9.1. It states "Most GPIO pins are configured as GPIOs and tri-stated by default." Furthermore, it seems to imply that the special pins listed in table 9.1 do not default to GPIO pins. For example, the table shows pins PA[5:2] have a default reset state as SSI0. However, the table also shows that GPIOAFSEL is 0 for those pins so I believe SSI0 is not really in play. Therefore, I assume the pins are really still GPIO pins and will be tri-stated by default at power-on. My question is, do these pins PA[5:2] tri-state at power-on? Or do they operate as SSI0 pins as listed in the table and are therefore active I/O pins at power-on?
Here is a link to the data sheet: