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TM4C123AE6PM: Special consideration GPIO pins

Part Number: TM4C123AE6PM

The Rev E data sheet for the TM4C123AE6PM describes "special consideration GPIO pins" on page 595 in table 9.1.   It states "Most GPIO pins are configured as GPIOs and tri-stated by default."   Furthermore, it seems to imply that the special pins listed in table 9.1 do not default to GPIO pins.   For example, the table shows pins PA[5:2]  have a default reset state as SSI0.   However, the table also shows that GPIOAFSEL is 0 for those pins so I believe SSI0 is not really in play.  Therefore, I assume the pins are really still GPIO pins and will be tri-stated by default at power-on.   My question is, do these pins PA[5:2] tri-state at power-on?    Or do they operate as SSI0 pins as listed in the table and are therefore active I/O pins at power-on?

Here is a link to the data sheet:

www.ti.com/.../tm4c123ae6pm

  • Hello Vern

    The pins mentioned are SSI pins only when there is no application in flash. If the application is in flash then the AFSEL being 0 allows them to revert to input only function. In other words there is no active driver from the device and hence is the IO's are tristated.
  • Let me see if I understand what you are saying. At reset the ROM boot loader process will look at address 0x0000.0004 to see if an application is present. If so, execution is transferred to the application and the pins in question remain tri-stated. However, if there is no application present then the boot loader will configure the pins as SSI0 and will respond to signals on them accordingly. Is that right? In which case, I assume that SSI0 is being operated in slave mode so SSI0CLK, SSI0FSS, SSI0RX are inputs. Only SSI0TX would be an output. Correct?
  • Hello Vern

    Yes, that is perfectly correct understanding. Also yes, SSI and I2C both peripherals are operated in Slave Mode.
  • Bravo to this poster for such a clarification!

    In (many) years here - I cannot recall this (default) set-up of MCU's (usually Port_A) various serial, communication ports being described so definitively.

    Pity that this thread will (soon) rotate away from eased/ready (front forum page) view - and such detail is (likely) unavailable elsewhere...