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EK-TM4C123GXL: What is switching speed of GPIO pins? I.e. maximum raw bit speed

Sebastian Gniazdowski
Prodigy 140 points
Part Number: EK-TM4C123GXL


Hello

I wonder how much can I expect from GPIO pins when arranged to use uDMA to read data clocked at high frequencies? Here a person tested STM32 to be 42 MHz capable:

http://cliffle.com/article/2015/06/06/pushing-pixels/

and here there are tests of RPi 1 (22 MHz) and RPi 2:

http://codeandlife.com/2012/07/03/benchmarking-raspberry-pi-gpio-speed/

I'm interested in the same numbers for Tiva C and MSP430.


Best regards,

Sebastian

  • 0
    TI__Guru**** 244400 points
    Hello Sebastian,

    Using the DMA controller for reading the GPIO data register has a startup delay of 4-6 clocks and every subsequent read in the burst would be 2-3 clocks, if they are scheduled to be a burst transfer. Single transfer would be inefficient.
  • 0 in reply to Amit Ashara
    Prodigy 140 points

    DMA performance is a nice quality trait of a MCU. Would be good if someone would establish and prove this for Tiva 123 GXL. Here it is established for Padi Stamp:

    https://github.com/kissste/rtl8710_VGA_Display_Driver

    which is clocked at 83 MHz, yet it can do 41.33 MHz DMA output – divider of 2, which is impressive. If Tiva does 3 cycles for DMA read & write, then it could do 26,66 MHz, which is almost NTSC/PAL frequency when digitized (I read that it's 27 MHz, 13 MHz from NTSC signal, but multiplied x2 because of 16 bits per pixel – CxY two bytes through 8 bit pixel port). Maybe Tiva can be slightly overclocked to do ~82 MHz to do solid 27 MHz, and/or maybe the divider is 2 not 3. Here a divider of 4 is verified for STM32F4:

    http://cliffle.com/article/2015/06/06/pushing-pixels/

    Output frequency of 40 MHz is obtained by underclocking the processor from 168 MHz to 160 MHz. It's a nice thing to test and prove this, I would even ask an employee to do this. That's my opinion, just that, thanks

  • 0 in reply to Sebastian Gniazdowski
    TI__Guru**** 244400 points
    Hello Sebastian,

    What is the application that you are using the EK-TM4C123GXL for which requires a high rate on the GPIO?
  • 0 in reply to Amit Ashara
    Prodigy 140 points
    The project is to drive RGB LED Matrix of dimension 32x16 (Adafruit) with NTSC/PAL video to create half-abstract vs. half-meaningful effects – colors, shadows, shapes. Pixel port is parallel 8 pin connector clocked at 27 Mhz (for those videos) – I need to read it.

    Best regards,
    Sebastian
  • 0 in reply to Sebastian Gniazdowski
    TI__Guru**** 244400 points
    Hello Sebastian,

    I don't think we will be able to support such an operation with the DMA. The GPIO works on the internal clock and while it may sample the data, since there is no synchronous phase relation between the system clock and the external clock, what it may result in is wrong data when performing unqualified DMA transfers.
  • 0 in reply to Amit Ashara
    Prodigy 140 points

    Ok but the VGA-output application is internally clocked, it would be directly possible, wonder how Tiva would perform. As for the externally clocked 8-bit input, I'm planning to use a timer-counter peripheral on one side of DMA in other uController, set to be externally clocked by the video decoder, to generate a DMA event every N clock edges. That's my research of what's possible with DMA and external clock, I might be wrong

    Best regards,
    Sebastian

  • 0 in reply to Sebastian Gniazdowski
    TI__Guru**** 244400 points
    Hello Sebastian,

    The timer takes 2 clock cycles to register an input. Then after a few clock cycle it generates a DMA request. The DMA request causes the DMA to start the transaction with 6 clocks of overhead on loading. If we are OK to miss the same then there is 2-3 clock cycle latency subsequently. This can be affected by CPU accessing the same SRAM which will stall the DMA. Overall, I would think that is a tough fit.