SSI reading data Issue

using the PORTJ  GPIO_PIN_2 as CS I got the follow:

*** SSI_0 & UART_0 done ***
Dato8 Addr= 0x102400 Read= 0x42
Dato8 Addr= 0x102400 Read= 0x7c
Dato8 Addr= 0x102400 Read= 0x7c
Dato8 Addr= 0x102400 Read= 0x7c
Dato8 Addr= 0x102400 Read= 0x7c
Dato16 Addr= 0x1024b0 Read= 0x4a7c
Dato16 Addr= 0x1024b0 Read= 0x4a40
Dato16 Addr= 0x1024b0 Read= 0x4a40
Dato16 Addr= 0x1024b0 Read= 0x4a40

the things improved a little but it needs to send the read function twice. 

changes that I made:

SSI configure funtion

void ConfigureSSI(void)
{
     MAP_SysCtlPeripheralReset (SYSCTL_PERIPH_GPIOA);
     MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
     MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);

     MAP_GPIOPinConfigure(GPIO_PA2_SSI0CLK);	//SCK
//     MAP_GPIOPinConfigure(GPIO_PA3_SSI0FSS);	//CS
     MAP_GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);	//Tx (MOSI)
     MAP_GPIOPinConfigure(GPIO_PA5_SSI0XDAT1);	//RX (MISO)
     MAP_GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_2); //| GPIO_PIN_3

     MAP_SSIConfigSetExpClk(SSI0_BASE, 120000000, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 8000000, 8);
//     MAP_SSIAdvModeSet(SSI0_BASE, SSI_ADV_MODE_READ_WRITE);
//     MAP_SSIAdvFrameHoldEnable(SSI0_BASE);
     MAP_SSIEnable(SSI0_BASE);
}

read function

unsigned int ft800mem_Read16(unsigned long ftAddress)
{
    unsigned int ftData16 = 0;                                  	// 16-bits to return
    unsigned char cTempAddr[3];                                 	// FT800 Memory Address
    unsigned char cTempData[2];                                 	// Place-holder for 16-bits being read
    unsigned char cZeroFill = ZERO;

    cTempAddr[2] = (char) (ftAddress >> 16) | MEM_READ;         	// Compose the command and address to send
    cTempAddr[1] = (char) (ftAddress >> 8);                     	// middle byte
    cTempAddr[0] = (char) (ftAddress);                          	// low byte

    GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_CS, 0);              	// Set chip select low
    while(SSIDataGetNonBlocking(SSI0_BASE, &pui32DataRx));

    SSIDataPut(SSI0_BASE, cTempAddr[2]);                      		// Send Memory Write plus high address byte
    SSIDataPut(SSI0_BASE, cTempAddr[1]);
    SSIDataPut(SSI0_BASE, cTempAddr[0]);

    SSIDataPut(SSI0_BASE, cZeroFill);                    			// Send dummy byte
//    SSIAdvDataPutFrameEnd(SSI0_BASE, cZeroFill);

    while(SSIBusy(SSI0_BASE));
    SSIDataGet(SSI0_BASE, &cTempData[0]); 				    		// Receive data byte
    SSIDataGet(SSI0_BASE, &cTempData[1]);

    GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_CS, GPIO_PIN_CS);    	  // Set chip select high

    ftData16 = (cTempData[1]<< 8) |                             	// Compose value to return - high byte
                       (cTempData[0]);                          	// low byte

  return ftData16;                                          		// Return 16-bits
}

oscilloscope signals using CS

1st read

2nd read

Hi,

The SPI interface is, from hardware point of  view , a ring shifting register - what is in master is transferred to slave and vice-versa. But, the first byte sent, the command, is not processed or known until fully saved into internal buffer, so after that is parsed (decoded) and starting  with the second byte, you may have a wanted result.

In other words, from software point of view, the first received byte is dummy and should be trashed and the second and followings could make a good result. The data sheet of your device specify the number of dummy bytes to be escaped/trashed before the good result. (IIRC that document is one of application notes specified by you in previous thread). So read the documentation again.

Also, IIRC, your device need the last address byte to be sent first - little endian system - so after parsing the address into bytes you must start sending them from index 0, not 2. Am I correct?

Hello Petrei

thanks for you response, really it helped me a lot.

I didn't understand that part in the document, it is necessary make a flush operation Amit said, becouse the master sends a byte and the slave answers. the address bytes and the dummy byte answer a data trash after, the slave gives the good bytes, is it correct?

and the document mention "send the MSB first" but the order of bytes is [2] first, [1] second, [0] last. So, I made the necessary changes in my functions and it works awesome! Using the Fss pin or any pin as CS it works very well, now I'm able to write and read any register

thank you so much

- Angel Nino

sharing my SSI configuration:

void ConfigureSSI(void)
{
     MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
     MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);

     MAP_GPIOPinConfigure(GPIO_PA2_SSI0CLK);	//SCK
     MAP_GPIOPinConfigure(GPIO_PA3_SSI0FSS);	//CS
     MAP_GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);	//Tx (MOSI)
     MAP_GPIOPinConfigure(GPIO_PA5_SSI0XDAT1);	//RX (MISO)
     MAP_GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 | GPIO_PIN_2); //

     MAP_SSIConfigSetExpClk(SSI0_BASE, 120000000, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 8000000, 8);
     MAP_SSIAdvModeSet(SSI0_BASE, SSI_ADV_MODE_READ_WRITE);
     MAP_SSIAdvFrameHoldEnable(SSI0_BASE);
     MAP_SSIEnable(SSI0_BASE);
}

// Read 32 bits

void ft800mem_Write32(unsigned long ftAddress, unsigned long ftData32)
{
    unsigned char cTempAddr[3];                                 // FT800 Memory Address
    unsigned char cTempData[4];                                 // 32-bit data to write

    cTempAddr[2] = (char) (ftAddress >> 16) | MEM_WRITE;        // Compose the command and address to send
    cTempAddr[1] = (char) (ftAddress >> 8);                     // middle byte
    cTempAddr[0] = (char) (ftAddress);                          // low byte

    cTempData[3] = (char) (ftData32 >> 24);                     // Compose data to be sent - high byte
    cTempData[2] = (char) (ftData32 >> 16);                     //
    cTempData[1] = (char) (ftData32 >> 8);                      //
    cTempData[0] = (char) (ftData32);                           // low byte

//    GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_CS, 0);            	 	// Set chip select low
    while(SSIDataGetNonBlocking(SSI0_BASE, &pui32DataRx));

    SSIDataPut(SSI0_BASE, cTempAddr[2]);                 	   		// Send Memory Write plus high address byte
    SSIDataPut(SSI0_BASE, cTempAddr[1]);
    SSIDataPut(SSI0_BASE, cTempAddr[0]);

    SSIDataPut(SSI0_BASE, cTempData[0]);                    	// Send data byte
    SSIDataPut(SSI0_BASE, cTempData[1]);
    SSIDataPut(SSI0_BASE, cTempData[2]);
//    SSIDataPut(SSI0_BASE, cTempData[3]);
    SSIAdvDataPutFrameEnd(SSI0_BASE, cTempData[3]);

//    while(SSIBusy(SSI0_BASE));
//    GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_CS, GPIO_PIN_CS);    // Set chip select high
}

Hello Angel

Advanced modes work differently from Legacy mode for the QSPI peripheral. In advanced mode the CS control is also handled by the peripheral and depending on whether you use the Advanced write or Advanced read-write operation, the requirement of flushing the RXFIFO may not or may be required.

Hello Amit

seems what in this case was necessary if I understood the correct using from advanced mode, I hope to be correct. I'll continue make more probes.

(comment: I'm practicing my english too, if I have any bad expression or incorrect word please tell me)

Thank you

-Angel Nino

Hello Angel

You can refer to use model of the QSPI in the following TI Design

www.ti.com/.../TIDM-TM4C129SDRAMNVM

Where it is interfaced to a Serial Flash interface.

sharing my read function:

unsigned int ft800mem_Read16(unsigned long ftAddress)
{
    unsigned int ftData16 = 0;                                  	// 16-bits to return
    unsigned char cTempAddr[3];                                 	// FT800 Memory Address
    unsigned char cTempData[2];                                 	// Place-holder for 16-bits being read
    unsigned char cZeroFill = ZERO;

    cTempAddr[2] = (char) (ftAddress >> 16) | MEM_READ;         	// Compose the command and address to send
    cTempAddr[1] = (char) (ftAddress >> 8);                     	// middle byte
    cTempAddr[0] = (char) (ftAddress);                          	// low byte

//    GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_CS, 0);              	// Set chip select low
    while(SSIDataGetNonBlocking(SSI0_BASE, &pui32DataRx));

    SSIDataPut(SSI0_BASE, cTempAddr[2]);                      		// Send Memory Write plus high address byte
    SSIDataPut(SSI0_BASE, cTempAddr[1]);
    SSIDataPut(SSI0_BASE, cTempAddr[0]);
    SSIDataPut(SSI0_BASE, cZeroFill);                    			// Send dummy byte
    SSIDataPut(SSI0_BASE, cZeroFill);
//    SSIDataPut(SSI0_BASE, cZeroFill);
    SSIAdvDataPutFrameEnd(SSI0_BASE, cZeroFill);

    SSIDataGet(SSI0_BASE, &pui32DataRx);
    SSIDataGet(SSI0_BASE, &pui32DataRx);
    SSIDataGet(SSI0_BASE, &pui32DataRx);
    SSIDataGet(SSI0_BASE, &pui32DataRx);
    SSIDataGet(SSI0_BASE, &cTempData[0]); 				    		// Receive data byte
    SSIDataGet(SSI0_BASE, &cTempData[1]);

//    while(SSIBusy(SSI0_BASE));
//    GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_CS, GPIO_PIN_CS);    	  // Set chip select high

    ftData16 = (cTempData[1]<< 8) |                             	// Compose value to return - high byte
                       (cTempData[0]);                          	// low byte

  return ftData16;                                          		// Return 16-bits
}

Regards

-Angel Nino

Hello Angel

Please see the reference code for Advanced mode use. The above pasted code is not the correct model for advanced mode.