I currently use TMS 570LS3137.
Please tell me the difference between the two "Livelock functions" below.
(Reference document = "Safety Manual for TMS570LS31x and TMS570L21x Hercules ARM-Based Safety Critical Microcontrollers User's Guide")
· 7.41 Flash Hard Error Cache and Livelock.
· 7.104 Primary SRAM Hard Error Cache and Livelock.
I understand the difference between Flash and SRAM "place of occurrence".
For these two types of Livelock,
(1) Is it possible to specify the occurrence factor (or occurrence location) by reading some sort of "system information" in the program? Please tell me if there is a way to identify it.
(2) If Livelock occurs, please tell me if there is any difference in "behavior" after occurrence.
